Merge pull request #139 from enjoy-digital/travis-ci

travis-ci: avoid use of conda (setup is simple enough to avoid it)

.sim-test.py

@@ -14,7 +14,7 @@ args = parser.parse_args()
 tests = [
     {
         'id':      'litex_sim',
-        'command': f'litex_sim --with-sdram --sdram-module {args.sdram_module}',
+        'command': f'python3 -m litex.tools.litex_sim --with-sdram --sdram-module {args.sdram_module}',
         'cwd':     os.getcwd(),
         'checkpoints': [
             { 'timeout': 240, 'good': [b'\n\\s*BIOS built on[^\n]+\n'] },

.travis.yml

@@ -1,38 +1,22 @@
 language: python
-dist: Xenial
+dist: bionic
 python: "3.6"
 
 before_install:
-  - export DL_DIR=$HOME/downloads
-  - mkdir -p $DL_DIR
-  - cd $DL_DIR
-
-  # Install and configure Conda
-  - wget -O miniconda.sh https://repo.continuum.io/miniconda/Miniconda3-latest-Linux-x86_64.sh
-  - bash miniconda.sh -b -p $HOME/miniconda
-  - source "$HOME/miniconda/etc/profile.d/conda.sh"
-  - hash -r
-  - conda config --set always_yes yes --set changeps1 no
-  - conda update -q conda
-  - conda info -a
+  - sudo apt-get update
+  - sudo apt-get -y install verilator libevent-dev libjson-c-dev
+  - pip install pexpect
 
 install:
-  # Create Conda environment with required packages
-  - conda create -q -n litedram -c 'conda-forge' -c 'litex-hub'
-      verilator libevent json-c
-      gcc-riscv64-elf-nostdc
-  - conda activate litedram
-
   # Get Migen / LiteX / Cores
   - wget https://raw.githubusercontent.com/enjoy-digital/litex/master/litex_setup.py
   - python3 litex_setup.py init install
 
-  # Simulation script dependences
-  - pip install pexpect
-
-  # Replace litex' litedram with currently tested revision
-  - cd $TRAVIS_BUILD_DIR
-  - ./setup.py install -f
+before_script:
+  # Get RISC-V toolchain
+  - wget https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6.tar.gz
+  - tar -xvf riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6.tar.gz
+  - export PATH=$PATH:$PWD/riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6/bin/
 
 script: ./.sim-test.py --sdram-module="$SDRAM_MODULE"