add 32MB SDRAM for hadbadge

Add AS4C32M8SA-7TCN 32MB SDRAM used on cartridge PCB
by Jacob Creedon for the Hackaday Supercon ECP5 badge.

These changes were orginally made by Michael Welling:
https://github.com/mwelling/litedram

KiCad design files for the SDRAM cartridge:
https://github.com/jcreedon/dram-cart/

The SDRAM cartridge PCB is shared at:
https://oshpark.com/shared_projects/IQSl2lid

shared DigiKey cart of the parts:
https://www.digikey.com/short/p1ct1h

More information in this blog post:
https://blog.oshpark.com/2019/12/20/

Hackaday Supercon 2019 badge PCB design:
https://github.com/Spritetm/hadbadge2019_pcb
This commit is contained in:
Drew Fustini 2020-01-06 00:46:28 +01:00
parent 8dae0c0c7f
commit 5d8d75f6cd
1 changed files with 9 additions and 0 deletions

View File

@ -190,6 +190,15 @@ class AS4C32M16(SDRAMModule):
technology_timings = _TechnologyTimings(tREFI=64e6/8192, tWTR=(2, None), tCCD=(1, None), tRRD=None) technology_timings = _TechnologyTimings(tREFI=64e6/8192, tWTR=(2, None), tCCD=(1, None), tRRD=None)
speedgrade_timings = {"default": _SpeedgradeTimings(tRP=18, tRCD=18, tWR=12, tRFC=(None, 60), tFAW=None, tRAS=None)} speedgrade_timings = {"default": _SpeedgradeTimings(tRP=18, tRCD=18, tWR=12, tRFC=(None, 60), tFAW=None, tRAS=None)}
class AS4C32M8(SDRAMModule):
memtype = "SDR"
# geometry
nbanks = 4
nrows = 8192
ncols = 1024
# timings
technology_timings = _TechnologyTimings(tREFI=64e6/8192, tWTR=(2, None), tCCD=(1, None), tRRD=(None, 15))
speedgrade_timings = {"default": _SpeedgradeTimings(tRP=20, tRCD=20, tWR=15, tRFC=(None, 66), tFAW=None, tRAS=44)}
# DDR ---------------------------------------------------------------------------------------------- # DDR ----------------------------------------------------------------------------------------------