frontend/adaptation: expose LiteDRAMPortDownConverter, LiteDRAMPortUpConverter
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@ -46,7 +46,7 @@ class LiteDRAMPortCDC(Module):
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]
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class _LiteDRAMPortDownConverter(Module):
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class LiteDRAMPortDownConverter(Module):
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"""LiteDRAM port DownConverter
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This module reduces user port data width to fit controller data width.
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@ -114,7 +114,7 @@ class _LiteDRAMPortDownConverter(Module):
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]
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class _LiteDRAMPortUpConverter(Module):
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class LiteDRAMPortUpConverter(Module):
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# TODO:
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# - handle all specials cases (incomplete / non aligned bursts)
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# - add exceptions on datapath for such cases
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@ -200,10 +200,10 @@ class LiteDRAMPortConverter(Module):
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# # #
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if port_from.dw > port_to.dw:
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converter = _LiteDRAMPortDownConverter(port_from, port_to)
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converter = LiteDRAMPortDownConverter(port_from, port_to)
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self.submodules += converter
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elif port_from.dw < port_to.dw:
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converter = _LiteDRAMPortUpConverter(port_from, port_to)
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converter = LiteDRAMPortUpConverter(port_from, port_to)
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self.submodules += converter
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else:
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self.comb += [
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