test: add handling of alternating write/read to benchmark runner

This commit is contained in:
Jędrzej Boczar 2020-02-11 12:14:12 +01:00
parent e16118abfd
commit 6744cf649c
3 changed files with 277 additions and 166 deletions

View File

@ -1,193 +1,282 @@
{
# sequential access
"test_0": {
"sdram_module": 'MT48LC16M16',
"sdram_module": "MT41K128M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"bist_length": 4096,
"bist_random": False,
"bist_length": 1,
"bist_random": false
}
},
"test_1": {
"sdram_module": 'MT48LC16M16',
"sdram_module": "MT41K128M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"bist_length": 512,
"bist_random": False,
"bist_length": 1024,
"bist_random": false
}
},
"test_2": {
"sdram_module": 'MT46V32M16',
"sdram_module": "MT41K128M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"bist_length": 512,
"bist_random": False,
"bist_length": 8192,
"bist_random": false
}
},
"test_3": {
"sdram_module": 'MT46V32M16',
"sdram_module": "MT41K128M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"bist_length": 2048,
"bist_random": False,
"bist_length": 1,
"bist_random": false
}
},
"test_4": {
"sdram_module": 'MT47H64M16',
"sdram_module": "MT41K128M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"bist_length": 1024,
"bist_random": False,
"bist_random": false
}
},
"test_5": {
"sdram_module": 'MT47H64M16',
"sdram_data_width": 16,
"sdram_module": "MT41K128M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"bist_length": 1024,
"bist_random": False,
"bist_length": 8192,
"bist_random": false
}
},
"test_6": {
"sdram_module": 'MT41K128M16',
"sdram_data_width": 16,
"sdram_module": "MT46V32M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"bist_length": 1024,
"bist_random": False,
"bist_length": 1,
"bist_random": false
}
},
"test_7": {
"sdram_module": 'MT41K128M16',
"sdram_module": "MT46V32M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"bist_length": 1024,
"bist_random": False,
"bist_random": false
}
},
# latency
"test_8": {
"sdram_module": 'MT48LC16M16',
"sdram_module": "MT46V32M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"bist_length": 1,
"bist_random": False,
"bist_length": 8192,
"bist_random": false
}
},
"test_9": {
"sdram_module": 'MT46V32M16',
"sdram_module": "MT46V32M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"bist_length": 1,
"bist_random": False,
"bist_random": false
}
},
"test_10": {
"sdram_module": 'MT47H64M16',
"sdram_module": "MT46V32M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"bist_length": 1,
"bist_random": False,
"bist_length": 1024,
"bist_random": false
}
},
"test_11": {
"sdram_module": 'MT41K128M16',
"sdram_data_width": 16,
"sdram_module": "MT46V32M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"bist_length": 1,
"bist_random": False,
"bist_length": 8192,
"bist_random": false
}
},
# random access
"test_12": {
"sdram_module": 'MT48LC16M16',
"sdram_module": "MT47H64M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"bist_length": 1024,
"bist_random": True,
"bist_length": 1,
"bist_random": false
}
},
"test_13": {
"sdram_module": 'MT46V32M16',
"sdram_module": "MT47H64M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"bist_length": 1024,
"bist_random": True,
"bist_random": false
}
},
"test_14": {
"sdram_module": 'MT47H64M16',
"sdram_module": "MT47H64M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"bist_length": 1024,
"bist_random": True,
"bist_length": 8192,
"bist_random": false
}
},
"test_15": {
"sdram_module": 'MT41K128M16',
"sdram_data_width": 16,
"sdram_module": "MT47H64M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"bist_length": 1024,
"bist_random": True,
"bist_length": 1,
"bist_random": false
}
},
# custom access pattern
"test_16": {
"sdram_module": 'MT48LC16M16',
"sdram_module": "MT47H64M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"bist_length": 1024,
"bist_random": false
}
},
"test_17": {
"sdram_module": "MT47H64M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"bist_length": 8192,
"bist_random": false
}
},
"test_18": {
"sdram_module": "MT48LC16M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"bist_length": 1,
"bist_random": false
}
},
"test_19": {
"sdram_module": "MT48LC16M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"bist_length": 1024,
"bist_random": false
}
},
"test_20": {
"sdram_module": "MT48LC16M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"bist_length": 8192,
"bist_random": false
}
},
"test_21": {
"sdram_module": "MT48LC16M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"bist_length": 1,
"bist_random": false
}
},
"test_22": {
"sdram_module": "MT48LC16M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"bist_length": 1024,
"bist_random": false
}
},
"test_23": {
"sdram_module": "MT48LC16M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"bist_length": 8192,
"bist_random": false
}
},
"test_24": {
"sdram_module": "MT41K128M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"pattern_file": "access_pattern.csv"
}
},
"test_17": {
"sdram_module": 'MT48LC16M16',
"test_25": {
"sdram_module": "MT41K128M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"pattern_file": "access_pattern.csv",
"pattern_file": "access_pattern.csv"
}
},
"test_18": {
"sdram_module": 'MT46V32M16',
"test_26": {
"sdram_module": "MT46V32M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"pattern_file": "access_pattern.csv",
"pattern_file": "access_pattern.csv"
}
},
"test_19": {
"sdram_module": 'MT46V32M16',
"test_27": {
"sdram_module": "MT46V32M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"pattern_file": "access_pattern.csv",
"pattern_file": "access_pattern.csv"
}
},
"test_20": {
"sdram_module": 'MT47H64M16',
"test_28": {
"sdram_module": "MT47H64M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"pattern_file": "access_pattern.csv",
"pattern_file": "access_pattern.csv"
}
},
"test_21": {
"sdram_module": 'MT47H64M16',
"sdram_data_width": 16,
"access_pattern": {
"pattern_file": "access_pattern.csv",
}
},
"test_22": {
"sdram_module": 'MT41K128M16',
"sdram_data_width": 16,
"access_pattern": {
"pattern_file": "access_pattern.csv",
}
},
"test_23": {
"sdram_module": 'MT41K128M16',
"test_29": {
"sdram_module": "MT47H64M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"pattern_file": "access_pattern.csv",
"pattern_file": "access_pattern.csv"
}
},
"test_30": {
"sdram_module": "MT48LC16M16",
"sdram_data_width": 32,
"bist_alternating": true,
"access_pattern": {
"pattern_file": "access_pattern.csv"
}
},
"test_31": {
"sdram_module": "MT48LC16M16",
"sdram_data_width": 32,
"bist_alternating": false,
"access_pattern": {
"pattern_file": "access_pattern.csv"
}
}
}

View File

@ -4,7 +4,7 @@ import json
import argparse
import itertools
modules = [
default_modules = [
'IS42S16160',
'IS42S16320',
'MT48LC4M16',
@ -39,41 +39,66 @@ modules = [
# 'MT40A1G8',
# 'MT40A512M16',
]
data_widths = [32]
bist_lengths = [1, 1024, 8192]
bist_randoms = [False]
access_patterns = ['access_pattern.csv']
default_bist_alternatings = [True, False]
default_data_widths = [32]
default_bist_lengths = [1, 1024, 8192]
default_bist_randoms = [False]
default_access_patterns = ['access_pattern.csv']
def convert_string_arg(args, arg, type):
map_func = {
bool: lambda s: {'false': False, 'true': True}[s.lower()],
int: lambda s: int(s, 0),
}
setattr(args, arg, [map_func[type](val) if not isinstance(val, type) else val for val in getattr(args, arg)])
def main():
parser = argparse.ArgumentParser(description='Generate configuration for all possible argument combinations.',
formatter_class=argparse.ArgumentDefaultsHelpFormatter)
parser.add_argument('--sdram-modules', nargs='+', default=modules, help='--sdram-module options')
parser.add_argument('--sdram-data-widths', nargs='+', default=data_widths, help='--sdram-data-width options')
parser.add_argument('--bist-lengths', nargs='+', default=bist_lengths, help='--bist-length options')
parser.add_argument('--bist-randoms', nargs='+', default=bist_randoms, help='--bist-random options')
parser.add_argument('--access-patterns', nargs='+', default=access_patterns, help='--access-pattern options')
parser.add_argument('--sdram-modules', nargs='+', default=default_modules, help='--sdram-module options')
parser.add_argument('--sdram-data-widths', nargs='+', default=default_data_widths, help='--sdram-data-width options')
parser.add_argument('--bist-alternatings', nargs='+', default=default_bist_alternatings, help='--bist-alternating options')
parser.add_argument('--bist-lengths', nargs='+', default=default_bist_lengths, help='--bist-length options')
parser.add_argument('--bist-randoms', nargs='+', default=default_bist_randoms, help='--bist-random options')
parser.add_argument('--access-patterns', nargs='+', default=default_access_patterns, help='--access-pattern options')
parser.add_argument('--name-format', default='test_%d', help='Name format for i-th test')
args = parser.parse_args()
bist_product = itertools.product(args.sdram_modules, args.sdram_data_widths, args.bist_lengths, args.bist_randoms)
pattern_product = itertools.product(args.sdram_modules, args.sdram_data_widths, args.access_patterns)
# make sure not to write those as strings
convert_string_arg(args, 'sdram_data_widths', int)
convert_string_arg(args, 'bist_alternatings', bool)
convert_string_arg(args, 'bist_lengths', int)
convert_string_arg(args, 'bist_randoms', bool)
bist_product = itertools.product(args.sdram_modules, args.sdram_data_widths, args.bist_alternatings,
args.bist_lengths, args.bist_randoms)
pattern_product = itertools.product(args.sdram_modules, args.sdram_data_widths, args.bist_alternatings,
args.access_patterns)
i = 0
configurations = {}
for module, data_width, bist_length, bist_random in bist_product:
for module, data_width, bist_alternating, bist_length, bist_random in bist_product:
if bist_random and not bist_alternating:
continue
configurations[args.name_format % i] = {
'sdram_module': module,
'sdram_data_width': data_width,
'bist_alternating': bist_alternating,
'access_pattern': {
'bist_length': bist_length,
'bist_random': bist_random,
}
}
i += 1
for module, data_width, access_pattern in pattern_product:
for module, data_width, bist_alternating, access_pattern in pattern_product:
if bist_random and not bist_alternating:
continue
configurations[args.name_format % i] = {
'sdram_module': module,
'sdram_data_width': data_width,
'bist_alternating': bist_alternating,
'access_pattern': {
'pattern_file': access_pattern,
}

View File

@ -87,7 +87,7 @@ class CustomAccess(Settings):
class BenchmarkConfiguration(Settings):
def __init__(self, name, sdram_module, sdram_data_width, access_pattern):
def __init__(self, name, sdram_module, sdram_data_width, bist_alternating, access_pattern):
self.set_attributes(locals())
def as_args(self):
@ -95,6 +95,8 @@ class BenchmarkConfiguration(Settings):
'--sdram-module=%s' % self.sdram_module,
'--sdram-data-width=%d' % self.sdram_data_width,
]
if self.bist_alternating:
args.append('--bist-alternating')
args += self.access_pattern.as_args()
return args
@ -219,6 +221,7 @@ class ResultsSummary:
'name': lambda d: d.config.name,
'sdram_module': lambda d: d.config.sdram_module,
'sdram_data_width': lambda d: d.config.sdram_data_width,
'bist_alternating': lambda d: d.config.bist_alternating,
'bist_length': lambda d: getattr(d.config.access_pattern, 'bist_length', None),
'bist_random': lambda d: getattr(d.config.access_pattern, 'bist_random', None),
'pattern_file': lambda d: getattr(d.config.access_pattern, 'pattern_file', None),
@ -310,7 +313,7 @@ class ResultsSummary:
formatters = self.text_formatters if formatted else {}
common_columns = ['name', 'sdram_module', 'sdram_data_width']
common_columns = ['name', 'sdram_module', 'sdram_data_width', 'bist_alternating']
latency_columns = ['write_latency', 'read_latency']
performance_columns = ['write_bandwidth', 'read_bandwidth', 'write_efficiency', 'read_efficiency']
@ -319,12 +322,6 @@ class ResultsSummary:
columns=common_columns + latency_columns,
column_formatting=formatters,
)
# yield 'Any access pattern', self.get_summary(
# mask=(df['is_latency'] == False),
# columns=common_columns + performance_columns + ['length', 'bist_random', 'pattern_file'],
# column_formatting=self.text_formatters,
# **kwargs,
# ),
yield 'Custom access pattern', self.get_summary(
mask=(df['is_latency'] == False) & (~pd.isna(df['pattern_file'])),
columns=common_columns + performance_columns + ['length', 'pattern_file'],