ci: migrate from Travis CI to Github Actions.

Only covers unit-tests for now, Verilator simulation and benchmarks still need to be adapted.
This commit is contained in:
Florent Kermarrec 2020-11-24 13:43:43 +01:00
parent b6252345af
commit 68cd462bd4
3 changed files with 32 additions and 83 deletions

31
.github/workflows/ci.yml vendored Normal file
View File

@ -0,0 +1,31 @@
name: ci
on: [push, pull_request]
jobs:
build:
runs-on: ubuntu-18.04
steps:
# Checkout Repository
- name: Checkout
uses: actions/checkout@v2
# Install Tools
- name: Install Tools
run: |
sudo apt-get install wget build-essential python3
pip3 install setuptools
# Install (n)Migen / LiteX / Cores
- name: Install LiteX
run: |
wget https://raw.githubusercontent.com/enjoy-digital/litex/master/litex_setup.py
python3 litex_setup.py init install --user
# Install Project
- name: Install Project
run: python3 setup.py develop --user
# Test
- name: Run Tests
run: python3 setup.py test

View File

@ -1,82 +0,0 @@
language: python
dist: bionic
python: "3.6"
before_install:
- sudo apt-get update
- sudo apt-get -y install verilator libevent-dev libjson-c-dev
- pip install pexpect numpy matplotlib pandas jinja2
install:
# Get Migen / LiteX / Cores
- cd ~/
- wget https://raw.githubusercontent.com/enjoy-digital/litex/master/litex_setup.py
- python3 litex_setup.py init install
# Install the version being tested
- cd $TRAVIS_BUILD_DIR
- python3 setup.py install
before_script:
# Get RISC-V toolchain
- wget https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6.tar.gz
- tar -xvf riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6.tar.gz
- export PATH=$PATH:$PWD/riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6/bin/
script: ./.sim-test.py --sdram-module="$SDRAM_MODULE"
jobs:
include:
- stage: "Unit tests"
script:
- cd $TRAVIS_BUILD_DIR
- python setup.py test
- stage: "Simulations"
env: SDRAM_MODULE=IS42S16160
- env: SDRAM_MODULE=IS42S16320
- env: SDRAM_MODULE=MT48LC4M16
- env: SDRAM_MODULE=MT48LC16M16
- env: SDRAM_MODULE=AS4C16M16
- env: SDRAM_MODULE=AS4C32M16
- env: SDRAM_MODULE=AS4C32M8
- env: SDRAM_MODULE=M12L64322A
- env: SDRAM_MODULE=M12L16161A
- env: SDRAM_MODULE=MT46V32M16
- env: SDRAM_MODULE=MT46H32M16
- env: SDRAM_MODULE=MT46H32M32
- env: SDRAM_MODULE=MT47H128M8
- env: SDRAM_MODULE=MT47H32M16
- env: SDRAM_MODULE=MT47H64M16
- env: SDRAM_MODULE=P3R1GE4JGF
- env: SDRAM_MODULE=MT41K64M16
- env: SDRAM_MODULE=MT41J128M16
- env: SDRAM_MODULE=MT41J256M16
- env: SDRAM_MODULE=K4B1G0446F
- env: SDRAM_MODULE=K4B2G1646F
- env: SDRAM_MODULE=H5TC4G63CFR
- env: SDRAM_MODULE=IS43TR16128B
- env: SDRAM_MODULE=MT8JTF12864
- env: SDRAM_MODULE=MT8KTF51264
- env: SDRAM_MODULE=MT18KSF1G72HZ
- env: SDRAM_MODULE=AS4C256M16D3A
- env: SDRAM_MODULE=MT16KTF1G64HZ
- env: SDRAM_MODULE=EDY4016A
- env: SDRAM_MODULE=MT40A1G8
- env: SDRAM_MODULE=MT40A512M16
- stage: Benchmarks
script:
- python3 -m test.run_benchmarks test/benchmarks.yml --results-cache cache.json --html --heartbeat 60 --timeout 540
# move benchmark artifacts to gh-pages/ directory that will be pushed to gh-pages branch
- mkdir -p gh-pages
- mv html/summary.html gh-pages/index.html
- mv cache.json gh-pages/cache.json
- touch gh-pages/.nojekyll
deploy:
provider: pages
skip_cleanup: true
token: $GITHUB_TOKEN
keep_history: true
local_dir: gh-pages
on:
branch: master

View File

@ -9,7 +9,7 @@
powered by Migen & LiteX powered by Migen & LiteX
``` ```
[![](https://travis-ci.com/enjoy-digital/litedram.svg?branch=master)](https://travis-ci.com/enjoy-digital/litedram) ![License](https://img.shields.io/badge/License-BSD%202--Clause-orange.svg) [![](https://github.com/enjoy-digital/litedram/workflows/ci/badge.svg)](https://github.com/enjoy-digital/litedram/actions) ![License](https://img.shields.io/badge/License-BSD%202--Clause-orange.svg)
[> Intro [> Intro