ci: migrate from Travis CI to Github Actions.
Only covers unit-tests for now, Verilator simulation and benchmarks still need to be adapted.
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name: ci
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on: [push, pull_request]
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jobs:
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build:
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runs-on: ubuntu-18.04
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steps:
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# Checkout Repository
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- name: Checkout
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uses: actions/checkout@v2
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# Install Tools
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- name: Install Tools
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run: |
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sudo apt-get install wget build-essential python3
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pip3 install setuptools
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# Install (n)Migen / LiteX / Cores
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- name: Install LiteX
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run: |
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wget https://raw.githubusercontent.com/enjoy-digital/litex/master/litex_setup.py
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python3 litex_setup.py init install --user
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# Install Project
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- name: Install Project
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run: python3 setup.py develop --user
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# Test
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- name: Run Tests
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run: python3 setup.py test
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.travis.yml
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.travis.yml
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language: python
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dist: bionic
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python: "3.6"
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before_install:
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- sudo apt-get update
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- sudo apt-get -y install verilator libevent-dev libjson-c-dev
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- pip install pexpect numpy matplotlib pandas jinja2
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install:
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# Get Migen / LiteX / Cores
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- cd ~/
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- wget https://raw.githubusercontent.com/enjoy-digital/litex/master/litex_setup.py
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- python3 litex_setup.py init install
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# Install the version being tested
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- cd $TRAVIS_BUILD_DIR
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- python3 setup.py install
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before_script:
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# Get RISC-V toolchain
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- wget https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6.tar.gz
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- tar -xvf riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6.tar.gz
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- export PATH=$PATH:$PWD/riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6/bin/
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script: ./.sim-test.py --sdram-module="$SDRAM_MODULE"
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jobs:
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include:
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- stage: "Unit tests"
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script:
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- cd $TRAVIS_BUILD_DIR
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- python setup.py test
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- stage: "Simulations"
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env: SDRAM_MODULE=IS42S16160
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- env: SDRAM_MODULE=IS42S16320
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- env: SDRAM_MODULE=MT48LC4M16
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- env: SDRAM_MODULE=MT48LC16M16
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- env: SDRAM_MODULE=AS4C16M16
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- env: SDRAM_MODULE=AS4C32M16
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- env: SDRAM_MODULE=AS4C32M8
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- env: SDRAM_MODULE=M12L64322A
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- env: SDRAM_MODULE=M12L16161A
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- env: SDRAM_MODULE=MT46V32M16
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- env: SDRAM_MODULE=MT46H32M16
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- env: SDRAM_MODULE=MT46H32M32
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- env: SDRAM_MODULE=MT47H128M8
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- env: SDRAM_MODULE=MT47H32M16
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- env: SDRAM_MODULE=MT47H64M16
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- env: SDRAM_MODULE=P3R1GE4JGF
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- env: SDRAM_MODULE=MT41K64M16
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- env: SDRAM_MODULE=MT41J128M16
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- env: SDRAM_MODULE=MT41J256M16
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- env: SDRAM_MODULE=K4B1G0446F
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- env: SDRAM_MODULE=K4B2G1646F
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- env: SDRAM_MODULE=H5TC4G63CFR
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- env: SDRAM_MODULE=IS43TR16128B
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- env: SDRAM_MODULE=MT8JTF12864
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- env: SDRAM_MODULE=MT8KTF51264
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- env: SDRAM_MODULE=MT18KSF1G72HZ
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- env: SDRAM_MODULE=AS4C256M16D3A
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- env: SDRAM_MODULE=MT16KTF1G64HZ
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- env: SDRAM_MODULE=EDY4016A
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- env: SDRAM_MODULE=MT40A1G8
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- env: SDRAM_MODULE=MT40A512M16
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- stage: Benchmarks
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script:
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- python3 -m test.run_benchmarks test/benchmarks.yml --results-cache cache.json --html --heartbeat 60 --timeout 540
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# move benchmark artifacts to gh-pages/ directory that will be pushed to gh-pages branch
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- mkdir -p gh-pages
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- mv html/summary.html gh-pages/index.html
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- mv cache.json gh-pages/cache.json
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- touch gh-pages/.nojekyll
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deploy:
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provider: pages
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skip_cleanup: true
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token: $GITHUB_TOKEN
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keep_history: true
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local_dir: gh-pages
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on:
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branch: master
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@ -9,7 +9,7 @@
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powered by Migen & LiteX
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powered by Migen & LiteX
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```
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```
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[![](https://travis-ci.com/enjoy-digital/litedram.svg?branch=master)](https://travis-ci.com/enjoy-digital/litedram) ![License](https://img.shields.io/badge/License-BSD%202--Clause-orange.svg)
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[![](https://github.com/enjoy-digital/litedram/workflows/ci/badge.svg)](https://github.com/enjoy-digital/litedram/actions) ![License](https://img.shields.io/badge/License-BSD%202--Clause-orange.svg)
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[> Intro
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[> Intro
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