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phy/s6ddrphy: fix

This commit is contained in:
Florent Kermarrec 2016-05-04 01:10:44 +02:00
parent bb67fdba57
commit 68e4b9322c
1 changed files with 2 additions and 2 deletions
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4
litedram/phy/s6ddrphy.py
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@ -51,7 +51,7 @@ class S6HalfRateDDRPHY(Module):
write_latency=2 write_latency=2
) )
else: else:
self.settings = sdram_settings.PhySettings( self.settings = PhySettings(
memtype=memtype, memtype=memtype,
dfi_databits=2*databits, dfi_databits=2*databits,
nphases=nphases, nphases=nphases,
@ -407,7 +407,7 @@ class S6QuarterRateDDRPHY(Module):
databits = len(pads.dq) databits = len(pads.dq)
nphases = 4 nphases = 4
self.settings = sdram_settings.PhySettings( self.settings = PhySettings(
memtype="DDR3", memtype="DDR3",
dfi_databits=2*databits, dfi_databits=2*databits,
nphases=nphases, nphases=nphases,