bist: Make reset write to activate like shoot.
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parent
85e4b65550
commit
6ae11fa5c8
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@ -81,7 +81,7 @@ class _LiteDRAMBISTGenerator(Module):
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class LiteDRAMBISTGenerator(Module, AutoCSR):
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class LiteDRAMBISTGenerator(Module, AutoCSR):
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def __init__(self, dram_port, random=True):
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def __init__(self, dram_port, random=True):
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self.reset = CSRStorage()
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self.reset = CSR()
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self.shoot = CSR()
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self.shoot = CSR()
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self.done = CSRStatus()
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self.done = CSRStatus()
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self.base = CSRStorage(dram_port.aw)
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self.base = CSRStorage(dram_port.aw)
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@ -104,7 +104,7 @@ class LiteDRAMBISTGenerator(Module, AutoCSR):
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self.submodules += base_sync, length_sync
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self.submodules += base_sync, length_sync
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self.comb += [
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self.comb += [
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reset_sync.i.eq(self.reset.storage),
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reset_sync.i.eq(self.reset.re),
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core.reset.eq(reset_sync.o),
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core.reset.eq(reset_sync.o),
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shoot_sync.i.eq(self.shoot.re),
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shoot_sync.i.eq(self.shoot.re),
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@ -189,7 +189,7 @@ class _LiteDRAMBISTChecker(Module, AutoCSR):
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class LiteDRAMBISTChecker(Module, AutoCSR):
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class LiteDRAMBISTChecker(Module, AutoCSR):
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def __init__(self, dram_port, random=True):
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def __init__(self, dram_port, random=True):
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self.reset = CSRStorage()
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self.reset = CSR()
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self.shoot = CSR()
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self.shoot = CSR()
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self.done = CSRStatus()
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self.done = CSRStatus()
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self.base = CSRStorage(dram_port.aw)
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self.base = CSRStorage(dram_port.aw)
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