test: cleanup test_bist.py code style

This commit is contained in:
Jędrzej Boczar 2020-03-17 14:23:08 +01:00
parent a883f88cca
commit 6ef623efae

View file

@ -142,77 +142,77 @@ class TestBIST(unittest.TestCase):
# define common test data used for both generator and checker tests
self.bist_test_data = {
"8bit": dict(
base = 2,
end = 2 + 8, # (end - base) must be pow of 2
length = 5,
base=2,
end=2 + 8, # (end - base) must be pow of 2
length=5,
# 2 3 4 5 6 7=2+5
expected = [0x00, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x00],
expected=[0x00, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x00],
),
"32bit": dict(
base = 0x04,
end = 0x04 + 8,
length = 5 * 4,
expected = [
0x00000000, # 0x00
0x00000000, # 0x04
0x00000001, # 0x08
0x00000002, # 0x0c
0x00000003, # 0x10
0x00000004, # 0x14
0x00000000, # 0x18
0x00000000, # 0x1c
base=0x04,
end=0x04 + 8,
length=5 * 4,
expected=[
0x00000000, # 0x00
0x00000000, # 0x04
0x00000001, # 0x08
0x00000002, # 0x0c
0x00000003, # 0x10
0x00000004, # 0x14
0x00000000, # 0x18
0x00000000, # 0x1c
],
),
"64bit": dict(
base = 0x10,
end = 0x10 + 8,
length = 5 * 8,
expected = [
0x0000000000000000, # 0x00
0x0000000000000000, # 0x08
0x0000000000000000, # 0x10
0x0000000000000001, # 0x18
0x0000000000000002, # 0x20
0x0000000000000003, # 0x28
0x0000000000000004, # 0x30
0x0000000000000000, # 0x38
base=0x10,
end=0x10 + 8,
length=5 * 8,
expected=[
0x0000000000000000, # 0x00
0x0000000000000000, # 0x08
0x0000000000000000, # 0x10
0x0000000000000001, # 0x18
0x0000000000000002, # 0x20
0x0000000000000003, # 0x28
0x0000000000000004, # 0x30
0x0000000000000000, # 0x38
],
),
"32bit_masked": dict(
base = 0x04,
end = 0x04 + 0x04, # TODO: fix address masking to be consistent
length = 6 * 4,
expected = [ # due to masking
0x00000000, # 0x00
0x00000004, # 0x04
0x00000005, # 0x08
0x00000002, # 0x0c
0x00000003, # 0x10
0x00000000, # 0x14
0x00000000, # 0x18
0x00000000, # 0x1c
base=0x04,
end=0x04 + 0x04, # TODO: fix address masking to be consistent
length=6 * 4,
expected=[ # due to masking
0x00000000, # 0x00
0x00000004, # 0x04
0x00000005, # 0x08
0x00000002, # 0x0c
0x00000003, # 0x10
0x00000000, # 0x14
0x00000000, # 0x18
0x00000000, # 0x1c
],
),
}
self.bist_test_data["32bit_long_sequential"] = dict(
base = 16,
end = 16 + 128,
length = 64,
expected = [0x00000000] * 128
base=16,
end=16 + 128,
length=64,
expected=[0x00000000] * 128
)
expected = self.bist_test_data["32bit_long_sequential"]["expected"]
expected[16//4:(16 + 64)//4] = list(range(64//4))
self.pattern_test_data = {
"8bit": dict(
pattern = [
pattern=[
# address, data
(0x00, 0xaa),
(0x05, 0xbb),
(0x02, 0xcc),
(0x07, 0xdd),
],
expected = [
expected=[
# data, address
0xaa, # 0x00
0x00, # 0x01
@ -225,14 +225,14 @@ class TestBIST(unittest.TestCase):
],
),
"32bit": dict(
pattern = [
pattern=[
# address, data
(0x00, 0xabadcafe),
(0x07, 0xbaadf00d),
(0x02, 0xcafefeed),
(0x01, 0xdeadc0de),
],
expected = [
expected=[
# data, address
0xabadcafe, # 0x00
0xdeadc0de, # 0x04
@ -245,14 +245,14 @@ class TestBIST(unittest.TestCase):
],
),
"64bit": dict(
pattern = [
pattern=[
# address, data
(0x00, 0x0ddf00dbadc0ffee),
(0x05, 0xabadcafebaadf00d),
(0x02, 0xcafefeedfeedface),
(0x07, 0xdeadc0debaadbeef),
],
expected = [
expected=[
# data, address
0x0ddf00dbadc0ffee, # 0x00
0x0000000000000000, # 0x08
@ -265,14 +265,14 @@ class TestBIST(unittest.TestCase):
],
),
"32bit_not_aligned": dict(
pattern = [
pattern=[
# address, data
(0x00, 0xabadcafe),
(0x07, 0xbaadf00d),
(0x02, 0xcafefeed),
(0x01, 0xdeadc0de),
],
expected = [
expected=[
# data, address
0xabadcafe, # 0x00
0xdeadc0de, # 0x04
@ -285,14 +285,14 @@ class TestBIST(unittest.TestCase):
],
),
"32bit_duplicates": dict(
pattern = [
pattern=[
# address, data
(0x00, 0xabadcafe),
(0x07, 0xbaadf00d),
(0x00, 0xcafefeed),
(0x07, 0xdeadc0de),
],
expected = [
expected=[
# data, address
0xcafefeed, # 0x00
0x00000000, # 0x04
@ -305,14 +305,14 @@ class TestBIST(unittest.TestCase):
],
),
"32bit_sequential": dict(
pattern = [
pattern=[
# address, data
(0x02, 0xabadcafe),
(0x03, 0xbaadf00d),
(0x04, 0xcafefeed),
(0x05, 0xdeadc0de),
],
expected = [
expected=[
# data, address
0x00000000, # 0x00
0x00000000, # 0x04
@ -331,6 +331,8 @@ class TestBIST(unittest.TestCase):
data["pattern"].append((i, 64 + i))
data["expected"][i] = 64 + i
# Generator ------------------------------------------------------------------------------------
def test_generator(self):
def main_generator(dut):
self.errors = 0
@ -364,14 +366,16 @@ class TestBIST(unittest.TestCase):
run_simulation(dut, generators)
self.assertEqual(self.errors, 0)
def generator_test(self, mem_expected, data_width, pattern=None, config_args=None, check_mem=True):
assert pattern is None or config_args is None, "_LiteDRAMBISTGenerator xor _LiteDRAMPatternGenerator"
def generator_test(self, mem_expected, data_width, pattern=None, config_args=None,
check_mem=True):
assert pattern is None or config_args is None, \
"_LiteDRAMBISTGenerator xor _LiteDRAMPatternGenerator"
class DUT(Module):
def __init__(self):
self.write_port = LiteDRAMNativeWritePort(address_width=32, data_width=data_width)
if pattern is not None:
self.submodules.generator = _LiteDRAMPatternGenerator(self.write_port, init=pattern)
self.submodules.generator = _LiteDRAMPatternGenerator(self.write_port, pattern)
else:
self.submodules.generator = _LiteDRAMBISTGenerator(self.write_port)
self.mem = DRAMMemory(data_width, len(mem_expected))
@ -393,6 +397,8 @@ class TestBIST(unittest.TestCase):
self.assertEqual(dut.mem.mem, mem_expected)
return dut
# _LiteDRAMBISTGenerator -----------------------------------------------------------------------
def test_bist_generator_8bit(self):
data = self.bist_test_data["8bit"]
self.generator_test(data.pop("expected"), data_width=8, config_args=data)
@ -428,7 +434,8 @@ class TestBIST(unittest.TestCase):
def test_bist_generator_random_data(self):
data = self.bist_test_data["32bit"]
data["random_data"] = True
dut = self.generator_test(data.pop("expected"), data_width=32, config_args=data, check_mem=False)
dut = self.generator_test(data.pop("expected"), data_width=32, config_args=data,
check_mem=False)
# only check that there are no duplicates and that data is not a simple sequence
mem = [val for val in dut.mem.mem if val != 0]
self.assertEqual(len(set(mem)), len(mem), msg="Duplicate values in memory")
@ -437,13 +444,16 @@ class TestBIST(unittest.TestCase):
def test_bist_generator_random_addr(self):
data = self.bist_test_data["32bit"]
data["random_addr"] = True
dut = self.generator_test(data.pop("expected"), data_width=32, config_args=data, check_mem=False)
dut = self.generator_test(data.pop("expected"), data_width=32, config_args=data,
check_mem=False)
# with random address and address wrapping (generator.end) we _can_ have duplicates
# we can at least check that the values written are not an ordered sequence
mem = [val for val in dut.mem.mem if val != 0]
self.assertNotEqual(mem, list(range(len(mem))), msg="Values are a sequence")
self.assertLess(max(mem), data["length"], msg="Too big value found")
# _LiteDRAMPatternGenerator --------------------------------------------------------------------
def test_pattern_generator_8bit(self):
data = self.pattern_test_data["8bit"]
self.generator_test(data["expected"], data_width=8, pattern=data["pattern"])
@ -468,8 +478,11 @@ class TestBIST(unittest.TestCase):
data = self.pattern_test_data["32bit_sequential"]
self.generator_test(data["expected"], data_width=32, pattern=data["pattern"])
# _LiteDRAMBISTChecker -------------------------------------------------------------------------
def checker_test(self, memory, data_width, pattern=None, config_args=None, check_errors=False):
assert pattern is None or config_args is None, "_LiteDRAMBISTChecker xor _LiteDRAMPatternChecker"
assert pattern is None or config_args is None, \
"_LiteDRAMBISTChecker xor _LiteDRAMPatternChecker"
class DUT(Module):
def __init__(self):
@ -513,6 +526,8 @@ class TestBIST(unittest.TestCase):
memory = data.pop("expected")
self.checker_test(memory, data_width=32, config_args=data)
# _LiteDRAMPatternChecker ----------------------------------------------------------------------
def test_pattern_checker_8bit(self):
data = self.pattern_test_data["8bit"]
self.checker_test(memory=data["expected"], data_width=8, pattern=data["pattern"])
@ -536,6 +551,8 @@ class TestBIST(unittest.TestCase):
memory=data["expected"], data_width=32, pattern=data["pattern"], check_errors=False)
self.assertEqual(checker.errors, num_duplicates)
# LiteDRAMBISTGenerator and LiteDRAMBISTChecker ------------------------------------------------
def bist_test(self, generator, checker, mem):
# write
yield from generator.reset()
@ -621,8 +638,9 @@ class TestBIST(unittest.TestCase):
def test_bist_csr_cdc(self):
class DUT(Module):
def __init__(self):
self.write_port = LiteDRAMNativeWritePort(address_width=32, data_width=32, clock_domain="async")
self.read_port = LiteDRAMNativeReadPort(address_width=32, data_width=32, clock_domain="async")
port_kwargs = dict(address_width=32, data_width=32, clock_domain="async")
self.write_port = LiteDRAMNativeWritePort(**port_kwargs)
self.read_port = LiteDRAMNativeReadPort(**port_kwargs)
self.submodules.generator = LiteDRAMBISTGenerator(self.write_port)
self.submodules.checker = LiteDRAMBISTChecker(self.read_port)
@ -650,6 +668,8 @@ class TestBIST(unittest.TestCase):
}
run_simulation(dut, generators, clocks)
# LiteDRAMDMAWriter ----------------------------------------------------------------------------
def dma_writer_test(self, pattern, mem_expected, data_width, **kwargs):
class DUT(Module):
def __init__(self):
@ -700,6 +720,8 @@ class TestBIST(unittest.TestCase):
data = self.pattern_test_data["32bit_duplicates"]
self.dma_writer_test(data["pattern"], data["expected"], data_width=32)
# LiteDRAMDMAReader ----------------------------------------------------------------------------
def dma_reader_test(self, pattern, mem_expected, data_width, **kwargs):
class DUT(Module):
def __init__(self):