common/Bitslip: add assert on cycles.
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@ -122,6 +122,7 @@ class BitSlip(Module):
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self.o = Signal(dw) if o is None else o
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self.o = Signal(dw) if o is None else o
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self.rst = Signal() if rst is None else rst
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self.rst = Signal() if rst is None else rst
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self.slp = Signal() if slp is None else slp
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self.slp = Signal() if slp is None else slp
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assert cycles >= 1
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# # #
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# # #
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