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test: add missing write-enable handling
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3c0fdf0710
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2 changed files with 3 additions and 0 deletions
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@ -62,6 +62,7 @@ class TestAdaptation(unittest.TestCase):
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yield
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yield write_port.wdata.valid.eq(1)
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yield write_port.wdata.data.eq(write_data[i])
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yield write_port.wdata.we.eq(0b1111)
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yield
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while (yield write_port.wdata.ready) == 0:
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yield
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@ -113,6 +114,7 @@ class TestAdaptation(unittest.TestCase):
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yield write_port.cmd.addr.eq(i)
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yield write_port.wdata.valid.eq(1)
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yield write_port.wdata.data.eq(write_data[i])
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yield write_port.wdata.we.eq(0xff)
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yield
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while (yield write_port.cmd.ready) == 0:
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yield
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@ -104,6 +104,7 @@ class TestAXI(unittest.TestCase):
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else:
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yield axi_port.w.last.eq(0)
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yield axi_port.w.data.eq(data)
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yield axi_port.w.strb.eq(2**axi_port.w.strb.nbits - 1)
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yield
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while (yield axi_port.w.ready) == 0:
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yield
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