Hardware/litedram
1
0
Fork 0
mirror of https://github.com/enjoy-digital/litedram.git synced 2025-01-04 09:52:25 -05:00
Code Issues Projects Releases Packages Wiki Activity

sdram_init: min value for wr is 5

Browse source
This commit is contained in:
Florent Kermarrec 2018-09-05 23:39:41 +02:00
parent 1652ab95c8
commit 7b61b68f68
1 changed files with 1 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
litedram/sdram_init.py
View file

@ -171,7 +171,7 @@ def get_sdram_phy_init_sequence(phy_settings, timing_settings):
if hasattr(phy_settings, "ron"):
ron = phy_settings.ron
wr = timing_settings.tWTR*phy_settings.nphases # >= ceiling(tWR/tCK)
wr = max(timing_settings.tWTR*phy_settings.nphases, 5) # >= ceiling(tWR/tCK)
mr0 = format_mr0(bl, cl, wr, 1)
mr1 = format_mr1(
z_to_ron[ron],