test/test_bist: remove vcd generation (only useful for debug)

This commit is contained in:
Florent Kermarrec 2019-07-23 21:46:03 +02:00
parent b4125fa50f
commit 7daf3551f6
1 changed files with 2 additions and 2 deletions

View File

@ -75,7 +75,7 @@ class TestBIST(unittest.TestCase):
# simulation
generators = [main_generator(dut)]
run_simulation(dut, main_generator(dut), vcd_name="generator.vcd")
run_simulation(dut, main_generator(dut))
self.assertEqual(self.errors, 0)
def test_bist(self):
@ -123,4 +123,4 @@ class TestBIST(unittest.TestCase):
mem.write_handler(dut.write_port),
mem.read_handler(dut.read_port)
]
run_simulation(dut, generators, vcd_name="bist.vcd")
run_simulation(dut, generators)