frontend/ecc/LiteDRAMNativePortECCW: Only set source.we when sink has at least one valid byte to write.

Write access with sink.we bits all set to 0 can happen when converters are used
in the user logic.

litedram/frontend/ecc.py

@@ -45,7 +45,7 @@ class LiteDRAMNativePortECCW(Module):
                 encoder.i.eq(sink.data[i*data_width_from//8:(i+1)*data_width_from//8]),
                 source.data[i*data_width_to//8:(i+1)*data_width_to//8].eq(encoder.o)
             ]
-        self.comb += source.we.eq(2**len(source.we)-1)
+        self.comb += If(sink.we != 0, source.we.eq(2**len(source.we)-1))
 
 # LiteDRAMNativePortECCR ---------------------------------------------------------------------------