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frontend/avalon: Consider single access as a 1 word burst and simplify.

This commit is contained in:
Florent Kermarrec 2023-06-01 09:48:35 +02:00
parent e0b144eddd
commit 8b790b79d9
1 changed files with 25 additions and 36 deletions
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61
litedram/frontend/avalon.py
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@ -50,10 +50,10 @@ class LiteDRAMAvalonMM2Native(LiteXModule):
# # # # # #
# Internal Signals. # Internal Signals.
burst_count = Signal(9) burst_count = Signal(9)
burst_write = Signal() burst_read = Signal()
address = Signal(port.address_width) burst_address = Signal(port.address_width)
address_offset = Signal(port.address_width) address_offset = Signal(port.address_width)
self.comb += address_offset.eq(base_address >> log2_int(port.data_width//8)) self.comb += address_offset.eq(base_address >> log2_int(port.data_width//8))
# Write Data-path. # Write Data-path.
@ -81,47 +81,36 @@ class LiteDRAMAvalonMM2Native(LiteXModule):
] ]
# Control-Path. # Control-Path.
self.fsm = fsm = FSM(reset_state="IDLE") self.fsm = fsm = FSM(reset_state="SINGLE-ACCESS")
fsm.act("IDLE", fsm.act("SINGLE-ACCESS",
avalon.waitrequest.eq(1), avalon.waitrequest.eq(1),
# Start of Access. port.cmd.addr.eq(avalon.address - address_offset),
If(avalon.read | avalon.write, port.cmd.we.eq(avalon.write),
NextValue(burst_count, avalon.burstcount), port.cmd.valid.eq(avalon.read | (avalon.write & wdata_fifo.sink.ready)),
NextValue(burst_write, avalon.write), port.cmd.last.eq(avalon.burstcount <= 1),
NextValue(address, avalon.address - address_offset), If(port.cmd.valid & port.cmd.ready,
# Burst Access. avalon.waitrequest.eq(0),
If(avalon.burstcount > 1, # If access is a burst, continue it in BURST-ACCESS.
If(avalon.read, If(~port.cmd.last,
avalon.waitrequest.eq(0) NextValue(burst_count, avalon.burstcount - 1),
), NextValue(burst_read, avalon.read),
NextState("BURST") NextValue(burst_address, port.cmd.addr + burst_increment),
# Single Access. NextState("BURST-ACCESS")
).Else(
port.cmd.addr.eq(avalon.address - address_offset),
port.cmd.we.eq(avalon.write),
port.cmd.valid.eq(avalon.read | (avalon.write & wdata_fifo.sink.ready)),
port.cmd.last.eq(1),
If(port.cmd.valid & port.cmd.ready,
avalon.waitrequest.eq(0),
)
) )
) )
) )
fsm.act("BURST", fsm.act("BURST-ACCESS",
avalon.waitrequest.eq(1), avalon.waitrequest.eq(1),
port.cmd.addr.eq(address), port.cmd.addr.eq(burst_address),
port.cmd.we.eq(avalon.write), port.cmd.we.eq(avalon.write),
port.cmd.valid.eq(~burst_write | (avalon.write & wdata_fifo.sink.ready)), port.cmd.valid.eq(burst_read | (avalon.write & wdata_fifo.sink.ready)),
port.cmd.last.eq(burst_count == 1), port.cmd.last.eq(burst_count == 1),
If(port.cmd.valid & port.cmd.ready, If(port.cmd.valid & port.cmd.ready,
If(burst_write, avalon.waitrequest.eq(~avalon.write),
avalon.waitrequest.eq(0) NextValue(burst_count, burst_count - 1),
), NextValue(burst_address, burst_address + burst_increment),
If(port.cmd.last, If(port.cmd.last,
NextState("IDLE") NextState("SINGLE-ACCESS")
).Else(
NextValue(burst_count, burst_count - 1),
NextValue(address, address + burst_increment)
) )
) )
) )