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test/test_timing_controllers: add simple tFAWController tests
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1 changed files with 36 additions and 1 deletions
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@ -6,7 +6,7 @@ import random
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from migen import *
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from migen import *
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from litedram.common import tXXDController
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from litedram.common import tXXDController, tFAWController
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def c2bool(c):
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def c2bool(c):
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@ -77,3 +77,38 @@ class TestTimingControllers(unittest.TestCase):
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def test_txxd_controller_random(self):
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def test_txxd_controller_random(self):
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for i in range(2, 32):
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for i in range(2, 32):
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self.txxd_controller_random_test(i, 512)
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self.txxd_controller_random_test(i, 512)
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def tfaw_controller_test(self, txxd, valids, readys):
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def generator(dut):
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dut.errors = 0
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for valid, ready in zip(valids, readys):
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yield dut.valid.eq(c2bool(valid))
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yield
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if (yield dut.ready) != c2bool(ready):
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dut.errors += 1
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dut = tFAWController(txxd)
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run_simulation(dut, [generator(dut)])
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self.assertEqual(dut.errors, 0)
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def test_tfaw_controller(self):
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tfaw = 8
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valids = "_----___________"
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readys = "-----______-----"
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self.tfaw_controller_test(tfaw, valids, readys)
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tfaw = 8
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valids = "_-_-_-_-________"
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readys = "--------___-----"
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self.tfaw_controller_test(tfaw, valids, readys)
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tfaw = 8
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valids = "_-_-___-_-______"
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readys = "----------_-----"
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self.tfaw_controller_test(tfaw, valids, readys)
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tfaw = 8
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valids = "_-_-____-_-______"
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readys = "-----------------"
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self.tfaw_controller_test(tfaw, valids, readys)
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