frontend/avalon: Simplify start condition.
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17527092db
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@ -53,8 +53,7 @@ class LiteDRAMAvalonMM2Native(LiteXModule):
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address = Signal(port.address_width)
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byteenable = Signal(avalon_data_width//8)
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writedata = Signal(avalon_data_width)
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start_transaction = Signal()
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start_condition = Signal()
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start = Signal()
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cmd_ready_seen = Signal()
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cmd_ready_count = Signal(9)
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@ -66,11 +65,11 @@ class LiteDRAMAvalonMM2Native(LiteXModule):
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]
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self.comb += [
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burst_start .eq(avalon.burstcount >= 2),
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burst_active.eq(burst_count >= 1),
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burst_start .eq(avalon.burstcount > 1),
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burst_active.eq(burst_count > 0),
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]
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self.sync += [
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If(start_transaction,
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If(start,
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byteenable.eq(avalon.byteenable),
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burst_count.eq(avalon.burstcount),
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address.eq(avalon.address - offset),
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@ -87,17 +86,20 @@ class LiteDRAMAvalonMM2Native(LiteXModule):
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port.cmd.valid.eq(avalon.read | avalon.write)
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),
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start_transaction.eq(avalon.read | avalon.write),
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If(downconvert,
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start_condition.eq(start_transaction)
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).Else(
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start_condition.eq(start_transaction & (burst_start | port.cmd.ready))
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If(avalon.read | avalon.write,
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If(downconvert,
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start.eq(1)
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).Else(
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start.eq(burst_start | port.cmd.ready)
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)
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),
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If(start_condition,
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If(start,
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If(downconvert,
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avalon.waitrequest.eq(1)
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).Else(
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If(~burst_start, avalon.waitrequest.eq(0))
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If(~burst_start,
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avalon.waitrequest.eq(0)
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)
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),
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If(avalon.write,
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If(burst_start,
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