litedram/init: export xdr ratio and databits.
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@ -479,6 +479,8 @@ def get_sdram_phy_c_header(phy_settings, timing_settings):
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# Define PHY type and number of phases
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r += "#define SDRAM_PHY_"+phytype+"\n"
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r += "#define SDRAM_PHY_XDR "+str(1 if phy_settings.memtype == "SDR" else 2) + "\n"
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r += "#define SDRAM_PHY_DATABITS "+str(phy_settings.databits) + "\n"
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r += "#define SDRAM_PHY_PHASES "+str(nphases)+"\n"
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# Define Read/Write Leveling capability
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