example/litedram_gen: reserve_nmi_interrupt no longer exists
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@ -197,7 +197,6 @@ class LiteDRAMCore(SoCSDRAM):
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SoCSDRAM.__init__(self, platform, sys_clk_freq,
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SoCSDRAM.__init__(self, platform, sys_clk_freq,
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cpu_type=core_config["cpu"],
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cpu_type=core_config["cpu"],
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l2_size=16*core_config["sdram_module_nb"],
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l2_size=16*core_config["sdram_module_nb"],
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reserve_nmi_interrupt=False,
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**kwargs)
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**kwargs)
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# crg
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# crg
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