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phy/s7ddrphy: handle cmd_latency properly (add it to rd/wrphase).

This commit is contained in:
Florent Kermarrec 2020-09-30 19:40:55 +02:00
parent 05ed5bf59d
commit b1c26d996f
1 changed files with 6 additions and 7 deletions
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7
litedram/phy/s7ddrphy.py
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@ -52,10 +52,9 @@ class S7DDRPHY(Module, AutoCSR):
cl, cwl = get_cl_cw(memtype, tck)
cl_sys_latency = get_sys_latency(nphases, cl)
cwl = cwl + cmd_latency
cwl_sys_latency = get_sys_latency(nphases, cwl)
rdcmdphase, rdphase = get_sys_phases(nphases, cl_sys_latency, cl)
wrcmdphase, wrphase = get_sys_phases(nphases, cwl_sys_latency, cwl)
rdphase = get_sys_phase(nphases, cl_sys_latency, cl + cmd_latency)
wrphase = get_sys_phase(nphases, cwl_sys_latency, cwl + cmd_latency)
# Registers --------------------------------------------------------------------------------
self._rst = CSRStorage()
@ -106,7 +105,7 @@ class S7DDRPHY(Module, AutoCSR):
rdcmdphase = _rdcmdphase,
wrcmdphase = _wrcmdphase,
cl = cl,
cwl = cwl - cmd_latency,
cwl = cwl,
read_latency = cl_sys_latency + 6,
write_latency = cwl_sys_latency,
cmd_latency = cmd_latency,