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add 400MHz tap setting (valid for -3 and -2/2E speed grades)
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@ -76,7 +76,9 @@ class S7DDRPHY(Module, AutoCSR):
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iodelay_tap_average = {
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200e6: 78e-12,
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300e6: 52e-12,
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400e6: 39e-12,
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}
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half_sys8x_taps = math.floor(tck/(4*iodelay_tap_average[iodelay_clk_freq]))
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self._half_sys8x_taps = CSRStorage(4, reset=half_sys8x_taps)
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