frontend/axi: expose w_buffer/r_buffer (can be useful for debug)
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@ -158,7 +158,7 @@ class LiteDRAMAXI2NativeW(Module):
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# Write Buffer
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w_buffer = stream.SyncFIFO(w_description(axi.data_width), buffer_depth)
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self.submodules += w_buffer
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self.submodules.w_buffer = w_buffer
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# Write ID Buffer & Response
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id_buffer = stream.SyncFIFO([("id", axi.id_width)], buffer_depth)
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@ -222,7 +222,7 @@ class LiteDRAMAXI2NativeR(Module):
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# Read buffer
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r_buffer = stream.SyncFIFO(r_description(axi.data_width, axi.id_width), buffer_depth)
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self.submodules += r_buffer
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self.submodules.r_buffer = r_buffer
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# Read Buffer reservation
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# - Incremented when data is planned to be queued
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