phy/ecp5ddrphy: improve presentation/readability
This commit is contained in:
Florent Kermarrec
parent
bb1b431184
commit
e0966e2ed3
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@ -1,5 +1,5 @@
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# This file is Copyright (c) 2019 David Shah <dave@ds0.me>
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# This file is Copyright (c) 2019 Florent Kermarrec <florent@enjoy-digital.fr>
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# This file is Copyright (c) 2019-2020 Florent Kermarrec <florent@enjoy-digital.fr>
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# License: BSD
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# 1:2 frequency-ratio DDR3 PHY for Lattice's ECP5
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@ -141,8 +141,7 @@ class ECP5DDRPHY(Module, AutoCSR):
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# Clock ------------------------------------------------------------------------------------
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for i in range(len(pads.clk_p)):
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sd_clk_se = Signal()
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self.specials += [
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Instance("ODDRX2F",
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self.specials += Instance("ODDRX2F",
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i_D0 = 0,
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i_D1 = 1,
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i_D2 = 0,
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@ -151,13 +150,11 @@ class ECP5DDRPHY(Module, AutoCSR):
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i_SCLK = ClockSignal(),
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i_RST = ResetSignal("sys2x"),
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o_Q = pads.clk_p[i]
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),
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]
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)
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# Addresses and Commands -------------------------------------------------------------------
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for i in range(addressbits):
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self.specials += \
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Instance("ODDRX2F",
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self.specials += Instance("ODDRX2F",
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i_D0 = dfi.phases[0].address[i],
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i_D1 = dfi.phases[0].address[i],
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i_D2 = dfi.phases[1].address[i],
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@ -168,8 +165,7 @@ class ECP5DDRPHY(Module, AutoCSR):
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o_Q = pads.a[i]
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)
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for i in range(bankbits):
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self.specials += \
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Instance("ODDRX2F",
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self.specials += Instance("ODDRX2F",
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i_D0 = dfi.phases[0].bank[i],
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i_D1 = dfi.phases[0].bank[i],
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i_D2 = dfi.phases[1].bank[i],
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@ -186,8 +182,7 @@ class ECP5DDRPHY(Module, AutoCSR):
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controls.append("cs_n")
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for name in controls:
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for i in range(len(getattr(pads, name))):
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self.specials += \
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Instance("ODDRX2F",
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self.specials += Instance("ODDRX2F",
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i_D0 = getattr(dfi.phases[0], name)[i],
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i_D1 = getattr(dfi.phases[0], name)[i],
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i_D2 = getattr(dfi.phases[1], name)[i],
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@ -293,8 +288,7 @@ class ECP5DDRPHY(Module, AutoCSR):
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).Else(
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dm_o_data_muxed.eq(dm_o_data[:4])
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)
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self.specials += \
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Instance("ODDRX2DQA",
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self.specials += Instance("ODDRX2DQA",
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i_D0 = dm_o_data_muxed[0],
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i_D1 = dm_o_data_muxed[1],
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i_D2 = dm_o_data_muxed[2],
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@ -308,7 +302,7 @@ class ECP5DDRPHY(Module, AutoCSR):
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dqs = Signal()
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dqs_oe_n = Signal()
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self.specials += \
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self.specials += [
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Instance("ODDRX2DQSB",
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i_D0 = dqs_serdes_pattern[0],
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i_D1 = dqs_serdes_pattern[1],
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@ -319,8 +313,7 @@ class ECP5DDRPHY(Module, AutoCSR):
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i_ECLK = ClockSignal("sys2x"),
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i_SCLK = ClockSignal(),
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o_Q = dqs
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)
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self.specials += \
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),
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Instance("TSHX2DQSA",
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i_T0 = ~(oe_dqs|dqs_postamble),
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i_T1 = ~(oe_dqs|dqs_preamble),
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@ -329,8 +322,9 @@ class ECP5DDRPHY(Module, AutoCSR):
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i_DQSW = dqsw,
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i_RST = ResetSignal("sys2x"),
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o_Q = dqs_oe_n,
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)
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self.specials += Tristate(pads.dqs_p[i], dqs, ~dqs_oe_n, dqs_i)
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),
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Tristate(pads.dqs_p[i], dqs, ~dqs_oe_n, dqs_i)
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]
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for j in range(8*i, 8*(i+1)):
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dq_o = Signal()
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@ -354,7 +348,7 @@ class ECP5DDRPHY(Module, AutoCSR):
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).Else(
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dq_o_data_muxed.eq(dq_o_data[:4])
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)
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self.specials += \
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self.specials += [
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Instance("ODDRX2DQA",
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i_D0 = dq_o_data_muxed[0],
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i_D1 = dq_o_data_muxed[1],
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@ -365,8 +359,7 @@ class ECP5DDRPHY(Module, AutoCSR):
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i_ECLK = ClockSignal("sys2x"),
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i_SCLK = ClockSignal(),
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o_Q = dq_o
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)
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self.specials += \
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),
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Instance("DELAYF",
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i_A = dq_i,
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i_LOADN = 1,
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@ -374,8 +367,7 @@ class ECP5DDRPHY(Module, AutoCSR):
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i_DIRECTION = 0,
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o_Z = dq_i_delayed,
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p_DEL_MODE = "DQS_ALIGNED_X2"
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)
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self.specials += \
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),
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Instance("IDDRX2DQA",
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i_D = dq_i_delayed,
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i_RST = ResetSignal("sys2x"),
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@ -393,6 +385,7 @@ class ECP5DDRPHY(Module, AutoCSR):
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o_Q2 = dq_i_data[2],
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o_Q3 = dq_i_data[3],
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)
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]
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dq_bitslip = BitSlip(4)
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self.comb += dq_bitslip.i.eq(dq_i_data)
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self.sync += \
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@ -412,7 +405,7 @@ class ECP5DDRPHY(Module, AutoCSR):
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dfi.phases[1].rddata[0*databits+j].eq(dq_bitslip.o[0]), dfi.phases[1].rddata[1*databits+j].eq(dq_bitslip.o[1]),
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dfi.phases[1].rddata[2*databits+j].eq(dq_bitslip.o[2]), dfi.phases[1].rddata[3*databits+j].eq(dq_bitslip.o[3]),
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]
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self.specials += \
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self.specials += [
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Instance("TSHX2DQA",
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i_T0 = ~oe_dq,
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i_T1 = ~oe_dq,
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@ -421,8 +414,9 @@ class ECP5DDRPHY(Module, AutoCSR):
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i_DQSW270 = dqsw270,
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i_RST = ResetSignal("sys2x"),
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o_Q = dq_oe_n,
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)
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self.specials += Tristate(pads.dq[j], dq_o, ~dq_oe_n, dq_i)
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),
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Tristate(pads.dq[j], dq_o, ~dq_oe_n, dq_i)
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]
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# Flow control -----------------------------------------------------------------------------
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#
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