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frontend/avalon: Merge BURST-WRITE/READ states.

This commit is contained in:
Florent Kermarrec 2023-06-01 09:01:48 +02:00
parent 60712547e5
commit e0b144eddd
1 changed files with 11 additions and 26 deletions
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37
litedram/frontend/avalon.py
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@ -51,6 +51,7 @@ class LiteDRAMAvalonMM2Native(LiteXModule):
# Internal Signals. # Internal Signals.
burst_count = Signal(9) burst_count = Signal(9)
burst_write = Signal()
address = Signal(port.address_width) address = Signal(port.address_width)
address_offset = Signal(port.address_width) address_offset = Signal(port.address_width)
self.comb += address_offset.eq(base_address >> log2_int(port.data_width//8)) self.comb += address_offset.eq(base_address >> log2_int(port.data_width//8))
@ -86,16 +87,14 @@ class LiteDRAMAvalonMM2Native(LiteXModule):
# Start of Access. # Start of Access.
If(avalon.read | avalon.write, If(avalon.read | avalon.write,
NextValue(burst_count, avalon.burstcount), NextValue(burst_count, avalon.burstcount),
NextValue(burst_write, avalon.write),
NextValue(address, avalon.address - address_offset), NextValue(address, avalon.address - address_offset),
# Burst Access. # Burst Access.
If(avalon.burstcount > 1, If(avalon.burstcount > 1,
If(avalon.write,
NextState("BURST-WRITE")
),
If(avalon.read, If(avalon.read,
avalon.waitrequest.eq(0), avalon.waitrequest.eq(0)
NextState("BURST-READ") ),
) NextState("BURST")
# Single Access. # Single Access.
).Else( ).Else(
port.cmd.addr.eq(avalon.address - address_offset), port.cmd.addr.eq(avalon.address - address_offset),
@ -108,30 +107,16 @@ class LiteDRAMAvalonMM2Native(LiteXModule):
) )
) )
) )
fsm.act("BURST-WRITE", fsm.act("BURST",
avalon.waitrequest.eq(1), avalon.waitrequest.eq(1),
port.cmd.addr.eq(address), port.cmd.addr.eq(address),
port.cmd.we.eq(1), port.cmd.we.eq(avalon.write),
port.cmd.valid.eq(avalon.write & wdata_fifo.sink.ready), port.cmd.valid.eq(~burst_write | (avalon.write & wdata_fifo.sink.ready)),
port.cmd.last.eq(burst_count == 1),
If(port.cmd.valid & port.cmd.ready,
avalon.waitrequest.eq(0),
If(port.cmd.last,
NextState("IDLE")
).Else(
NextValue(burst_count, burst_count - 1),
NextValue(address, address + burst_increment)
)
)
)
fsm.act("BURST-READ",
avalon.waitrequest.eq(1),
port.cmd.addr.eq(address),
port.cmd.we.eq(0),
port.cmd.valid.eq(1),
port.cmd.last.eq(burst_count == 1), port.cmd.last.eq(burst_count == 1),
If(port.cmd.valid & port.cmd.ready, If(port.cmd.valid & port.cmd.ready,
If(burst_write,
avalon.waitrequest.eq(0)
),
If(port.cmd.last, If(port.cmd.last,
NextState("IDLE") NextState("IDLE")
).Else( ).Else(