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phy/gensdrphy: padd clk to SDROutput/SDRInput/SDRTristate.

This commit is contained in:
Florent Kermarrec 2020-07-08 07:00:11 +02:00
parent a8fa38e286
commit edd5e0ec78
1 changed files with 14 additions and 11 deletions
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17
litedram/phy/gensdrphy.py
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@ -49,15 +49,17 @@ class GENSDRPHY(Module):
pads.sel_group(pads_group) pads.sel_group(pads_group)
# Addresses and Commands --------------------------------------------------------------- # Addresses and Commands ---------------------------------------------------------------
self.specials += [SDROutput(i=dfi.p0.address[i], o=pads.a[i]) for i in range(len(pads.a))] for i in range(len(pads.a)):
self.specials += [SDROutput(i=dfi.p0.bank[i], o=pads.ba[i]) for i in range(len(pads.ba))] self.specials += SDROutput(i=dfi.p0.address[i], o=pads.a[i], clk=ClockSignal("sys"))
self.specials += SDROutput(i=dfi.p0.cas_n, o=pads.cas_n) for i in range(len(pads.ba)):
self.specials += SDROutput(i=dfi.p0.ras_n, o=pads.ras_n) self.specials += SDROutput(i=dfi.p0.bank[i], o=pads.ba[i], clk=ClockSignal("sys"))
self.specials += SDROutput(i=dfi.p0.we_n, o=pads.we_n) self.specials += SDROutput(i=dfi.p0.cas_n, o=pads.cas_n, clk=ClockSignal("sys"))
self.specials += SDROutput(i=dfi.p0.ras_n, o=pads.ras_n, clk=ClockSignal("sys"))
self.specials += SDROutput(i=dfi.p0.we_n, o=pads.we_n, clk=ClockSignal("sys"))
if hasattr(pads, "cke"): if hasattr(pads, "cke"):
self.specials += SDROutput(i=dfi.p0.cke, o=pads.cke) self.specials += SDROutput(i=dfi.p0.cke, o=pads.cke, clk=ClockSignal("sys"))
if hasattr(pads, "cs_n"): if hasattr(pads, "cs_n"):
self.specials += SDROutput(i=dfi.p0.cs_n, o=pads.cs_n) self.specials += SDROutput(i=dfi.p0.cs_n, o=pads.cs_n, clk=ClockSignal("sys"))
# DQ/DM Data Path -------------------------------------------------------------------------- # DQ/DM Data Path --------------------------------------------------------------------------
for i in range(len(pads.dq)): for i in range(len(pads.dq)):
@ -66,6 +68,7 @@ class GENSDRPHY(Module):
o = dfi.p0.wrdata[i], o = dfi.p0.wrdata[i],
oe = dfi.p0.wrdata_en, oe = dfi.p0.wrdata_en,
i = dfi.p0.rddata[i], i = dfi.p0.rddata[i],
clk = ClockSignal("sys")
) )
if hasattr(pads, "dm"): if hasattr(pads, "dm"):
for i in range(len(pads.dm)): for i in range(len(pads.dm)):