Fix failing timing

2018-09-07 22:12:24 -04:00 · 2018-09-07 22:12:24 -04:00 · efd7a47890
parent 849b1f6c35
commit efd7a47890
1 changed files with 2 additions and 2 deletions
--- a/litedram/core/multiplexer.py
+++ b/litedram/core/multiplexer.py
@ -125,10 +125,10 @@ class tXXDController(Module):
        # # #
        if txxd is not None:
-            count = Signal(max=max(txxd, 2))
+            count = Signal(max=max(txxd+1, 2))
            self.sync += \
                If(valid,
-                    count.eq(txxd - 1),
+                    count.eq(txxd),
                    If((txxd - 1) == 0,
                        ready.eq(1)
                    ).Else(