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sdram_init/ddr4: set data mask enable bit

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This commit is contained in:
Florent Kermarrec 2019-02-02 23:14:30 +01:00
parent 6d09a47103
commit f2074542a1
1 changed files with 1 additions and 1 deletions
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2
litedram/sdram_init.py
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@ -320,7 +320,7 @@ def get_sdram_phy_init_sequence(phy_settings, timing_settings):
mr2 = format_mr2(cwl, z_to_rtt_wr[rtt_wr])
mr3 = 0
mr4 = 0
mr5 = 0
mr5 = 1 << 10 # data mask enable
mr6 = format_mr6(4) # FIXME: tCCD
init_sequence = [