bist: Improving documentation a bit.
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@ -13,7 +13,22 @@ from litedram.frontend.dma import LiteDRAMDMAWriter, LiteDRAMDMAReader
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@CEInserter()
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class LFSR(Module):
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"""Linear-Feedback Shift Register to generate a pseudo-random sequence."""
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"""Linear-Feedback Shift Register to generate a pseudo-random sequence.
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Parameters
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----------
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n_out : int
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Width of the output data signal.
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n_state : int
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???
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taps : list of int
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???
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Attributes
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----------
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o : in
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Output data
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"""
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def __init__(self, n_out, n_state=31, taps=[27, 30]):
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self.o = Signal(n_out)
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@ -36,7 +51,18 @@ class LFSR(Module):
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@CEInserter()
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class Counter(Module):
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"""Simple incremental counter."""
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"""Simple incremental counter.
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Parameters
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----------
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n_out : int
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Width of the output data signal.
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Attributes
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----------
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o : in
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Output data
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"""
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def __init__(self, n_out):
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self.o = Signal(n_out)
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@ -86,13 +112,20 @@ class _LiteDRAMBISTGenerator(Module):
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class LiteDRAMBISTGenerator(Module, AutoCSR):
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"""litex module to generate a given pattern in memory.abs
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CSRs:
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* reset - Reset the module
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* start - Start the checking
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* done - The module has completed writing pattern
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Attributes
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----------
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reset : in
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Reset the module.
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start : in
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Start the generation.
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* base - DRAM address to start from.
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* length - Number of DRAM words to check for.
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base : in
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DRAM address to start from.
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length : in
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Number of DRAM words to write.
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done : out
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The module has completed writing the pattern.
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"""
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def __init__(self, dram_port, random=True):
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@ -236,7 +269,7 @@ class LiteDRAMBISTChecker(Module, AutoCSR):
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base : in
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DRAM address to start from.
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length : in
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Number of DRAM words to check for.
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Number of DRAM words to check.
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halt_on_error : in
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Stop checking at the first error to occur.
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