Jędrzej Boczar 000a352079 frontend/adaptation: delay sending write commands to prevent data loss during up-conversion		2020-05-12 17:15:18 +02:00
..
core	Merge pull request #179 from antmicro/jboc/docs	2020-04-10 19:58:45 +02:00
frontend	frontend/adaptation: delay sending write commands to prevent data loss during up-conversion	2020-05-12 17:15:18 +02:00
phy	usddrphy: Support for x4 chip based DIMMs	2020-04-29 10:47:31 +01:00
__init__.py	update code, start bankmachine refactoring and remove old code (will be rewritten)	2015-09-15 10:22:39 +02:00
common.py	common: add PHYPadsReducer to only use specific DRAM modules.	2020-04-29 10:34:34 +02:00
dfii.py	dfii: use reset_less on datapath/configuration CSRStorages.	2020-04-06 13:17:47 +02:00
gen.py	litedram_gen: fix LiteDRAMECP5DDRPHYCRG clkin freq (input_clk_freq and not sys_clk_freq).	2020-03-26 18:10:26 +01:00
init.py	phy/init: add phytype to PhySettings and export more parameters to C header to simplify software.	2020-04-16 10:20:34 +02:00
modules.py	modules: Add MTA18ASF2G72PZ DDR4 RDIMM	2020-04-29 10:40:19 +01:00