litedram/test
Florent Kermarrec ad8ca86e13 frontend/adaptation: implement LiteDRAMReadPortUpConverter correctly
still some corner cases to manage
2016-06-15 23:57:16 +02:00
..
Makefile test: add upconverter_tb and some fixes 2016-05-24 21:14:49 +02:00
__init__.py update code, start bankmachine refactoring and remove old code (will be rewritten) 2015-09-15 10:22:39 +02:00
bist_async_tb.py frontend: introduce mode on ports: write, read or both 2016-06-15 17:51:46 +02:00
bist_tb.py frontend: introduce mode on ports: write, read or both 2016-06-15 17:51:46 +02:00
common.py test: add random and autocheck on downconverter_tb and upconverter_tb 2016-06-08 17:33:21 +02:00
downconverter_tb.py frontend: introduce mode on ports: write, read or both 2016-06-15 17:51:46 +02:00
upconverter_tb.py frontend/adaptation: implement LiteDRAMReadPortUpConverter correctly 2016-06-15 23:57:16 +02:00