litedram/litedram
Florent Kermarrec 5ce6bf7824 frontend/ecc: Add burst_cycles parameter (ease understanding and will be required if used on non 1:4 DDR PHYs). 2021-06-08 17:28:46 +02:00
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core Merge pull request #238 from antmicro/jboc/refresh-all-banks 2021-03-31 08:50:25 +02:00
frontend frontend/ecc: Add burst_cycles parameter (ease understanding and will be required if used on non 1:4 DDR PHYs). 2021-06-08 17:28:46 +02:00
phy Merge pull request #242 from antmicro/jboc/lpddr4-copyrights 2021-04-01 19:00:15 +02:00
__init__.py update code, start bankmachine refactoring and remove old code (will be rewritten) 2015-09-15 10:22:39 +02:00
common.py lpddr4: add missing copyright comments 2021-04-01 10:07:02 +02:00
dfii.py add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
gen.py litedram_gen: Avoid multi-lines on user_port. 2021-03-02 10:54:20 +01:00
init.py fix gcc warning: function used but not defined 2021-05-26 10:35:28 -04:00
modules.py Merge pull request #236 from jersey99/master 2021-04-01 19:00:51 +02:00