litedram/test
Tim 'mithro' Ansell 8ff2f8779b bist: Adding "halt on error" functionality.
Also include ability to see address of error and expected verse actual
data values.

Extend the test bench to test this functionality.
2016-12-17 14:09:50 +01:00
..
__init__.py update code, start bankmachine refactoring and remove old code (will be rewritten) 2015-09-15 10:22:39 +02:00
bist_async_tb.py bist: Refactoring test bench. 2016-12-17 14:09:50 +01:00
bist_tb.py bist: Adding "halt on error" functionality. 2016-12-17 14:09:50 +01:00
common.py bist: Adding "halt on error" functionality. 2016-12-17 14:09:50 +01:00
downconverter_tb.py frontend: introduce mode on ports: write, read or both 2016-06-15 17:51:46 +02:00
Makefile test: add upconverter_tb and some fixes 2016-05-24 21:14:49 +02:00
upconverter_tb.py frontend/adaptation: implement LiteDRAMReadPortUpConverter correctly 2016-06-15 23:57:16 +02:00