litedram/litedram
2019-04-29 15:00:13 -04:00
..
core core/crossbar: cosmetic 2019-01-22 13:56:35 +01:00
frontend frontend/axi: move AXIBurst2Beat to LiteX 2019-04-19 12:14:13 +02:00
phy phy: add copyrights 2019-04-29 09:16:53 +02:00
__init__.py update code, start bankmachine refactoring and remove old code (will be rewritten) 2015-09-15 10:22:39 +02:00
common.py common/tXXDController: revert Yosys workarounds 2019-04-29 14:24:31 +02:00
dfii.py multirank: one cs_n/cke/odt/clk per rank 2018-09-09 14:32:15 +02:00
modules.py modules/ddr3: add MT41K64M16 2019-02-20 22:47:55 +01:00
sdram_init.py sdram_init: use "unsigned long" for address values 2019-04-29 15:00:13 -04:00