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mac/wishbone: Switch to LiteXModule.

This commit is contained in:
Florent Kermarrec 2024-06-25 17:57:16 +02:00
parent 20e892c214
commit 591b77e991
1 changed files with 4 additions and 2 deletions
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6
liteeth/mac/wishbone.py
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@ -8,6 +8,8 @@
import math
from litex.gen import *
from liteeth.common import *
from liteeth.mac import sram
@ -15,7 +17,7 @@ from litex.soc.interconnect import wishbone
# MAC Wishbone Interface ---------------------------------------------------------------------------
class LiteEthMACWishboneInterface(Module, AutoCSR):
class LiteEthMACWishboneInterface(LiteXModule):
def __init__(self, dw, nrxslots=2, ntxslots=2, endianness="big", timestamp=None,
rxslots_read_only = True,
txslots_write_only = False,
@ -30,7 +32,7 @@ class LiteEthMACWishboneInterface(Module, AutoCSR):
# Storage in SRAM.
# ----------------
sram_depth = math.ceil(eth_mtu/(dw//8))
self.submodules.sram = sram.LiteEthMACSRAM(dw, sram_depth, nrxslots, ntxslots, endianness, timestamp)
self.sram = sram.LiteEthMACSRAM(dw, sram_depth, nrxslots, ntxslots, endianness, timestamp)
self.comb += [
self.sink.connect(self.sram.sink),
self.sram.source.connect(self.source),