mac/sram: Minor cleanup by directly using port instead of ports[n] in the loop.
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@ -289,8 +289,8 @@ class LiteEthMACSRAMReader(Module, AutoCSR):
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# Connect Memory ports.
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cases = {}
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for n, port in enumerate(ports):
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self.comb += ports[n].re.eq(read)
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self.comb += ports[n].adr.eq(length[int(math.log2(dw//8)):])
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self.comb += port.re.eq(read)
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self.comb += port.adr.eq(length[int(math.log2(dw//8)):])
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cases[n] = [rd_data.eq(port.dat_r)]
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self.comb += Case(rd_slot, cases)
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