mac/core: Move crc into switchable domain
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3f695a8320
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811722cbaa
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@ -61,6 +61,11 @@ class LiteEthMACCore(Module, AutoCSR):
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self.sync += If(self.ps_preamble_error.o,
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self.sync += If(self.ps_preamble_error.o,
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self.preamble_errors.status.eq(self.preamble_errors.status + 1)),
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self.preamble_errors.status.eq(self.preamble_errors.status + 1)),
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if sys_data_path:
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self.data_path_converter(tx_pipeline, rx_pipeline, core_dw, phy.dw, endianness)
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cd_tx = cd_rx = "sys"
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dw = core_dw
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if not isinstance(phy, LiteEthPHYModel) and with_preamble_crc:
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if not isinstance(phy, LiteEthPHYModel) and with_preamble_crc:
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# CRC insert/check
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# CRC insert/check
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crc32_inserter = BufferizeEndpoints({"sink": DIR_SINK})(crc.LiteEthMACCRC32Inserter(eth_phy_description(dw)))
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crc32_inserter = BufferizeEndpoints({"sink": DIR_SINK})(crc.LiteEthMACCRC32Inserter(eth_phy_description(dw)))
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@ -78,11 +83,6 @@ class LiteEthMACCore(Module, AutoCSR):
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self.sync += If(self.ps_crc_error.o,
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self.sync += If(self.ps_crc_error.o,
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self.crc_errors.status.eq(self.crc_errors.status + 1)),
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self.crc_errors.status.eq(self.crc_errors.status + 1)),
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if sys_data_path:
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self.data_path_converter(tx_pipeline, rx_pipeline, core_dw, phy.dw, endianness)
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cd_tx = cd_rx = "sys"
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dw = core_dw
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# Padding
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# Padding
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if with_padding:
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if with_padding:
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padding_inserter = padding.LiteEthMACPaddingInserter(dw, 60)
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padding_inserter = padding.LiteEthMACPaddingInserter(dw, 60)
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