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mac/sram/timestamping: Fix stat_fifo.sink.valid refactoring typo.

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Fixes a bug which would fill the TX return channel FIFO whenever the
SRAM Reader FSM is in the IDLE state. Instead, the FIFO should be
filled when the FSM reaches the END state, in which it will remain for
exactly a single clock cycle.

Fixes: 392414eef8 ("mac: Review Timestamping, simplify and...")
Signed-off-by: Leon Schuermann <leon@is.currently.online>
This commit is contained in:
Leon Schuermann 2021-05-07 09:27:14 +02:00 committed by Florent Kermarrec
parent e718a9ea5d
commit af29c09ac0
1 changed files with 1 additions and 1 deletions
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2
liteeth/mac/sram.py
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@ -264,7 +264,7 @@ class LiteEthMACSRAMReader(Module, AutoCSR):
if timestamp is not None:
# Latch Timestamp on start of outgoing packet.
self.sync == If(start, stat_fifo.sink.timestamp.eq(timestamp))
self.comb += stat_fifo.sink.valid.eq(fsm.ongoing("IDLE")),
self.comb += stat_fifo.sink.valid.eq(fsm.ongoing("END")),
self.comb += stat_fifo.sink.slot.eq(cmd_fifo.source.slot)
# Trigger event when Status FIFO has contents.
self.comb += self.ev.done.trigger.eq(stat_fifo.source.valid),