core/icmp: Switch to LiteXModule.

This commit is contained in:
Florent Kermarrec 2023-07-10 09:59:37 +02:00
parent 01073323ff
commit f74beeeb71
1 changed files with 20 additions and 16 deletions

View File

@ -1,12 +1,14 @@
#
# This file is part of LiteEth.
#
# Copyright (c) 2015-2020 Florent Kermarrec <florent@enjoy-digital.fr>
# Copyright (c) 2015-2023 Florent Kermarrec <florent@enjoy-digital.fr>
# SPDX-License-Identifier: BSD-2-Clause
from liteeth.common import *
from litex.gen import *
from litex.soc.interconnect.packet import PacketFIFO
from liteeth.common import *
from liteeth.packet import Depacketizer, Packetizer
# ICMP TX ------------------------------------------------------------------------------------------
@ -16,10 +18,11 @@ class LiteEthICMPPacketizer(Packetizer):
Packetizer.__init__(self,
eth_icmp_description(dw),
eth_ipv4_user_description(dw),
icmp_header)
icmp_header
)
class LiteEthICMPTX(Module):
class LiteEthICMPTX(LiteXModule):
def __init__(self, ip_address, dw=8):
self.sink = sink = stream.Endpoint(eth_icmp_user_description(dw))
self.source = source = stream.Endpoint(eth_ipv4_user_description(dw))
@ -27,7 +30,7 @@ class LiteEthICMPTX(Module):
# # #
# Packetizer.
self.submodules.packetizer = packetizer = LiteEthICMPPacketizer(dw)
self.packetizer = packetizer = LiteEthICMPPacketizer(dw)
self.comb += sink.connect(packetizer.sink, keep={
"valid",
"last",
@ -37,10 +40,11 @@ class LiteEthICMPTX(Module):
"checksum",
"quench",
"data",
"last_be"})
"last_be"
})
# FSM.
self.submodules.fsm = fsm = FSM(reset_state="IDLE")
self.fsm = fsm = FSM(reset_state="IDLE")
fsm.act("IDLE",
If(packetizer.source.valid,
NextState("SEND")
@ -69,7 +73,7 @@ class LiteEthICMPDepacketizer(Depacketizer):
icmp_header)
class LiteEthICMPRX(Module):
class LiteEthICMPRX(LiteXModule):
def __init__(self, ip_address, dw=8):
self.sink = sink = stream.Endpoint(eth_ipv4_user_description(dw))
self.source = source = stream.Endpoint(eth_icmp_user_description(dw))
@ -77,11 +81,11 @@ class LiteEthICMPRX(Module):
# # #
# Depacketizer.
self.submodules.depacketizer = depacketizer = LiteEthICMPDepacketizer(dw)
self.depacketizer = depacketizer = LiteEthICMPDepacketizer(dw)
self.comb += sink.connect(depacketizer.sink)
# FSM.
self.submodules.fsm = fsm = FSM(reset_state="IDLE")
self.fsm = fsm = FSM(reset_state="IDLE")
fsm.act("IDLE",
If(depacketizer.source.valid,
NextState("DROP"),
@ -124,14 +128,14 @@ class LiteEthICMPRX(Module):
# ICMP Echo ----------------------------------------------------------------------------------------
class LiteEthICMPEcho(Module):
class LiteEthICMPEcho(LiteXModule):
def __init__(self, dw=8):
self.sink = sink = stream.Endpoint(eth_icmp_user_description(dw))
self.source = source = stream.Endpoint(eth_icmp_user_description(dw))
# # #
self.submodules.buffer = PacketFIFO(eth_icmp_user_description(dw),
self.buffer = PacketFIFO(eth_icmp_user_description(dw),
payload_depth = 128//(dw//8),
param_depth = 1,
buffered = True
@ -145,11 +149,11 @@ class LiteEthICMPEcho(Module):
# ICMP ---------------------------------------------------------------------------------------------
class LiteEthICMP(Module):
class LiteEthICMP(LiteXModule):
def __init__(self, ip, ip_address, dw=8):
self.submodules.tx = tx = LiteEthICMPTX(ip_address, dw)
self.submodules.rx = rx = LiteEthICMPRX(ip_address, dw)
self.submodules.echo = echo = LiteEthICMPEcho(dw)
self.tx = tx = LiteEthICMPTX(ip_address, dw)
self.rx = rx = LiteEthICMPRX(ip_address, dw)
self.echo = echo = LiteEthICMPEcho(dw)
self.comb += [
rx.source.connect(echo.sink),
echo.source.connect(tx.sink)