Xiretza 7a44209f77 Make memory/CSR regions customizable in config ... Also remove interrupt mapping, since it's unused without a CPU anyway.		2020-02-12 15:55:04 +01:00
..
targets	examples: use integrated sram instead of external one. (Also fix regression with new SoC that no longer support address decoders passed to add_wb_slave)	2020-02-11 21:22:13 +01:00
test	examples: use integrated sram instead of external one. (Also fix regression with new SoC that no longer support address decoders passed to add_wb_slave)	2020-02-11 21:22:13 +01:00
__init__.py	README: update and rename example_designs to examples	2018-08-31 08:26:37 +02:00
make.py	examples: keep up to date with LiteX	2019-11-23 15:23:24 +01:00
udp_s7phyrgmii.yml	Move more options to config file	2020-02-12 15:55:04 +01:00
wishbone_mii.yml	Make memory/CSR regions customizable in config	2020-02-12 15:55:04 +01:00