155 lines
4.3 KiB
Python
Executable File
155 lines
4.3 KiB
Python
Executable File
#!/usr/bin/env python3
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#
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# This file is part of LiteEth
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#
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# Copyright (c) 2020 Florent Kermarrec <florent@enjoy-digital.fr>
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# SPDX-License-Identifier: BSD-2-Clause
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# LiteEth Etherbone test utility.
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import sys
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import time
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import argparse
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from litex import RemoteClient
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KiB = 1024
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MiB = 1024*KiB
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# Identifier Test ----------------------------------------------------------------------------------
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def ident_test(port):
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wb = RemoteClient(port=port)
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wb.open()
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fpga_identifier = ""
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for i in range(256):
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c = chr(wb.read(wb.bases.identifier_mem + 4*i) & 0xff)
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fpga_identifier += c
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if c == "\0":
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break
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print(fpga_identifier)
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wb.close()
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# Access Test --------------------------------------------------------------------------------------
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def access_test(port):
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wb = RemoteClient(port=port)
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wb.open()
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data = 0x12345678
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addr = 0x100
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print("Write over Etherbone at 0x{:08x}: 0x{:08x}.".format(addr, data))
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wb.write(wb.mems.sram.base + addr, data)
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print("Read over Etherbone at 0x{:08x}: 0x{:08x}.".format(addr, wb.read(wb.mems.sram.base + addr)))
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wb.close()
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# SRAM Test ----------------------------------------------------------------------------------------
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def sram_test(port):
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wb = RemoteClient(port=port)
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wb.open()
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def mem_dump(base, length):
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for addr in range(base, base + length, 4):
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if (addr%16 == 0):
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if addr != base:
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print("")
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print("0x{:08x}".format(addr), end=" ")
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data = wb.read(addr)
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for i in reversed(range(4)):
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print("{:02x}".format((data >> (8*i)) & 0xff), end=" ")
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print("")
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def mem_write(base, datas):
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for n, addr in enumerate(range(base, base + 4*len(datas), 4)):
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if (addr%16 == 0):
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if addr != base:
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print("")
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print("0x{:08x}".format(addr), end=" ")
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data = datas[n]
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for i in reversed(range(4)):
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print("{:02x}".format((data >> (8*i)) & 0xff), end=" ")
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wb.write(addr, data)
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print("")
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print("Fill SRAM with counter:")
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mem_write(wb.mems.sram.base, [i for i in range(128//4)])
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print("")
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print("Dump SRAM:")
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mem_dump(wb.mems.sram.base, 128)
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print("")
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print("Fill SRAM with 4 32-bit words:")
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mem_write(wb.mems.sram.base, [0x01234567, 0x89abcdef, 0x5aa55aa5, 0xa55aa55a])
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print("")
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print("Dump SRAM:")
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mem_dump(wb.mems.sram.base, 128)
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print("")
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wb.close()
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# Speed Test ---------------------------------------------------------------------------------------
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def speed_test(port):
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wb = RemoteClient(port=port)
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wb.open()
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test_size = 16*KiB
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burst_size = 128
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print("Testing write speed... ", end="")
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start = time.time()
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for i in range(test_size//(4*burst_size)):
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wb.write(wb.mems.sram.base, [j for j in range(burst_size)])
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end = time.time()
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duration = (end - start)
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print("{:3.2f} KiB/s".format(test_size/(duration*KiB)))
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print("Testing read speed... ", end="")
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start = time.time()
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for i in range(test_size//(4*burst_size)):
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wb.read(wb.mems.sram.base, length=burst_size)
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end = time.time()
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duration = (end - start)
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print("{:3.2f} KiB/s".format(test_size/(duration*KiB)))
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wb.close()
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# Run ----------------------------------------------------------------------------------------------
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def main():
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parser = argparse.ArgumentParser(description="LiteEth Etherbone test utility")
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parser.add_argument("--port", default="1234", help="Host bind port")
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parser.add_argument("--ident", action="store_true", help="Read FPGA identifier")
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parser.add_argument("--access", action="store_true", help="Test single Write/Read access over Etherbone")
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parser.add_argument("--sram", action="store_true", help="Test SRAM access over Etherbone")
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parser.add_argument("--speed", action="store_true", help="Test speed over Etherbone")
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args = parser.parse_args()
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port = int(args.port, 0)
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if args.ident:
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ident_test(port=port)
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if args.access:
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access_test(port=port)
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if args.sram:
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sram_test(port=port)
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if args.speed:
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speed_test(port=port)
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if __name__ == "__main__":
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main()
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