liteeth/liteeth
Vamsi K Vytla 59e04608a8 Adds RGMII phy support for Xilinx Ultrascale Devices. Hardware tested on HTG-940 2019-09-04 15:11:20 -07:00
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core add CONTRIBUTORS file and add copyright header to all files 2019-06-24 11:43:10 +02:00
frontend add CONTRIBUTORS file and add copyright header to all files 2019-06-24 11:43:10 +02:00
mac add CONTRIBUTORS file and add copyright header to all files 2019-06-24 11:43:10 +02:00
phy Adds RGMII phy support for Xilinx Ultrascale Devices. Hardware tested on HTG-940 2019-09-04 15:11:20 -07:00
software liteeth/software: remove libwip/libuip examples. 2019-06-17 21:17:52 +02:00
__init__.py init repo 2015-09-07 13:29:34 +02:00
common.py add CONTRIBUTORS file and add copyright header to all files 2019-06-24 11:43:10 +02:00
crossbar.py add CONTRIBUTORS file and add copyright header to all files 2019-06-24 11:43:10 +02:00