42 lines
1.3 KiB
Python
42 lines
1.3 KiB
Python
from liteeth.common import *
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from liteeth.frontend.tty import LiteEthTTY
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from targets.base import BaseSoC
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class TTYSoC(BaseSoC):
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default_platform = "kc705"
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def __init__(self, platform):
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BaseSoC.__init__(self, platform,
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mac_address=0x10e2d5000000,
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ip_address="192.168.0.42")
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self.submodules.tty = LiteEthTTY(self.core.udp, convert_ip("192.168.0.14"), 10000)
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self.comb += self.tty.source.connect(self.tty.sink)
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class TTYSoCDevel(TTYSoC):
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csr_map = {
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"logic_analyzer": 20
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}
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csr_map.update(TTYSoC.csr_map)
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def __init__(self, platform):
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from litescope.frontend.logic_analyzer import LiteScopeLogicAnalyzer
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from litescope.core.port import LiteScopeTerm
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TTYSoC.__init__(self, platform)
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debug = (
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self.tty.sink.stb,
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self.tty.sink.ack,
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self.tty.sink.data,
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self.tty.source.stb,
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self.tty.source.ack,
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self.tty.source.data
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)
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self.submodules.logic_analyzer = LiteScopeLogicAnalyzer(debug, 4096)
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self.logic_analyzer.trigger.add_port(LiteScopeTerm(self.logic_analyzer.dw))
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def do_exit(self, vns):
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self.logic_analyzer.export(vns, "test/logic_analyzer.csv")
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default_subtarget = TTYSoC
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