73 lines
2.4 KiB
Python
Executable File
73 lines
2.4 KiB
Python
Executable File
#!/usr/bin/env python3
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#
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# This file is part of LiteScope.
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#
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# Copyright (c) 2020 Florent Kermarrec <florent@enjoy-digital.fr>
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# SPDX-License-Identifier: BSD-2-Clause
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# Use:
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# ./arty.py --build --load
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# lxserver --udp (for LiteScope over UDP)
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# litescope_cli: will trigget an immediate capture!
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# litescope_cli --help: list the available trigger option.
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# litescope_cli --list: list the signals that can be used as triggers.
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# litescope_cli -v main_count 128: trigger on count value == 128.
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# litescope_cli -r litescopesoc_cpu_ibus_stb: trigger in ibus_stb rising edge
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# For more information: https://github.com/enjoy-digital/litex/wiki/Use-LiteScope-To-Debug-A-SoC
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import os
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import argparse
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from migen import *
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from litex_boards.platforms import digilent_arty
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from litex_boards.targets.digilent_arty import *
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from litescope import LiteScopeAnalyzer
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# LiteScopeSoC -------------------------------------------------------------------------------------
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class LiteScopeSoC(BaseSoC):
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def __init__(self):
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platform = digilent_arty.Platform()
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# BaseSoC ----------------------------------------------------------------------------------
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BaseSoC.__init__(self,
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integrated_rom_size = 0x8000,
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with_etherbone = True,
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)
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# LiteScope Analyzer -----------------------------------------------------------------------
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count = Signal(8)
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self.sync += count.eq(count + 1)
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analyzer_signals = [
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self.cpu.ibus,
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count,
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]
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self.submodules.analyzer = LiteScopeAnalyzer(analyzer_signals,
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depth = 1024,
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clock_domain = "sys",
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samplerate = self.sys_clk_freq,
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csr_csv = "analyzer.csv")
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self.add_csr("analyzer")
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# Build --------------------------------------------------------------------------------------------
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def main():
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parser = argparse.ArgumentParser(description="LiteScope example on Arty A7")
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parser.add_argument("--build", action="store_true", help="Build bitstream")
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parser.add_argument("--load", action="store_true", help="Load bitstream")
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args = parser.parse_args()
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soc = LiteScopeSoC()
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builder = Builder(soc, csr_csv="csr.csv")
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builder.build(run=args.build)
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if args.load:
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prog = soc.platform.create_programmer()
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prog.load_bitstream(os.path.join(builder.gateware_dir, soc.build_name + ".bit"))
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if __name__ == "__main__":
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main()
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