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#
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# This file is part of LiteX-Boards.
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# Copyright (c) 2021 Omkar Bhilare <ombhilare999@gmail.com>
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# Copyright (c) 2021 Michael Welling <mwelling@ieee.org>
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# SPDX-License-Identifier: BSD-2-Clause
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticePlatform
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from litex.build.lattice.programmer import TinyProgProgrammer
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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# Clk / Rst
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("clk100", 0, Pins("61"), IOStandard("LVCMOS33")),
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# Leds
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("user_led", 0, Pins("28 29 31 32"), IOStandard("LVCMOS33")),
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("user_btn_n", 0, Pins( "25"), IOStandard("LVCMOS33")),
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# SPIFlash
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("spiflash", 0,
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Subsignal("cs_n", Pins("71"), IOStandard("LVCMOS33")),
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Subsignal("clk", Pins("70"), IOStandard("LVCMOS33")),
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Subsignal("mosi", Pins("67"), IOStandard("LVCMOS33")),
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Subsignal("miso", Pins("68"), IOStandard("LVCMOS33")),
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),
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# SDR SDRAM
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("sdram_clock", 0, Pins("93"), IOStandard("LVCMOS33")),
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("sdram", 0,
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Subsignal("a", Pins("118 117 116 101 81 83 90 91 82 84 119 85 87")),
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Subsignal("dq", Pins("96 97 98 99 95 80 79 78")),
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Subsignal("we_n", Pins("128")),
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Subsignal("ras_n", Pins("124")),
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Subsignal("cas_n", Pins("125")),
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Subsignal("cs_n", Pins("122")),
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Subsignal("cke", Pins("88")),
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Subsignal("ba", Pins("121 120")),
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Subsignal("dm", Pins("94")),
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IOStandard("LVCMOS33"),
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Misc("SLEWRATE=FAST")
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),
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]
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# Connectors ---------------------------------------------------------------------------------------
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_connectors = [
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# A2-H2, Pins 1-13
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# H9-A6, Pins 14-24
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# G1-J2, Pins 25-31
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("GPIO", " 37 39 42 44 38 41 43 45"),
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("GPIO1", " 47 49 55 60 48 52 56 62"),
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("GPIO2", "107 112 114 129 110 113 115 130"),
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("GPIO3", " 7 9 15 12 4 8 10 11"),
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("grove", " 73 74 75 76 104 102 106 105")
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]
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# Default peripherals
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serial = [
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("serial", 0,
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Subsignal("tx", Pins("GPIO:0")),
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Subsignal("rx", Pins("GPIO:1")),
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IOStandard("LVCMOS33")
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)
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(LatticePlatform):
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default_clk_name = "clk100"
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default_clk_period = 1e9/100e6
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def __init__(self, toolchain="icestorm"):
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LatticePlatform.__init__(self, "ice40-hx8k-tq144:4k", _io, _connectors, toolchain=toolchain)
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self.add_extension(serial)
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def create_programmer(self):
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return TinyProgProgrammer()
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def do_finalize(self, fragment):
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LatticePlatform.do_finalize(self, fragment)
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self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6)
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