66 lines
2.7 KiB
Python
66 lines
2.7 KiB
Python
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#
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# This file is part of LiteX-Boards.
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#
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# Copyright (c) 2021 Andrew Dennison <andrew@motec.com.au>
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# Copyright (c) 2022 Charles-Henri Mousset <ch.mousset@gmail.com>
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# SPDX-License-Identifier: BSD-2-Clause
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import os
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from litex.build.generic_platform import *
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from litex.build.efinix.platform import EfinixPlatform
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from litex.build.efinix.programmer import EfinixAtmelProgrammer
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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# Clk
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("clk33", 0, Pins("C3"), IOStandard("3.3_V_LVTTL_/_LVCMOS")), # net PLL_IN
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# Buttons
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("user_btn", 0, Pins("G1"), IOStandard("3.3_V_LVTTL_/_LVCMOS"), Misc("WEAK_PULLUP")),
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("user_btn", 1, Pins("F1"), IOStandard("3.3_V_LVTTL_/_LVCMOS"), Misc("WEAK_PULLUP")),
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# Leds
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("user_led", 0, Pins("G4"), IOStandard("3.3_V_LVTTL_/_LVCMOS"), Misc("DRIVE_STRENGTH=3")),
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("user_led", 1, Pins("J2"), IOStandard("3.3_V_LVTTL_/_LVCMOS"), Misc("DRIVE_STRENGTH=3")),
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("user_led", 2, Pins("C2"), IOStandard("3.3_V_LVTTL_/_LVCMOS"), Misc("DRIVE_STRENGTH=3")),
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("user_led", 3, Pins("E3"), IOStandard("3.3_V_LVTTL_/_LVCMOS"), Misc("DRIVE_STRENGTH=3")),
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("user_led", 4, Pins("B3"), IOStandard("3.3_V_LVTTL_/_LVCMOS"), Misc("DRIVE_STRENGTH=3")),
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# SPIFlash (W25Q80DV)
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("spiflash", 0,
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Subsignal("cs_n", Pins("J4")), # net SPI_SS
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Subsignal("clk", Pins("H4")), # net SPI_SCLK
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Subsignal("mosi", Pins("F4")), # net SPI_MOSI
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Subsignal("miso", Pins("H3")), # net SPI_MISO
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#Subsignal("wp", Pins("")),
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#Subsignal("hold", Pins("")),
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IOStandard("3.3_V_LVTTL_/_LVCMOS")
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),
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]
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# Connectors ---------------------------------------------------------------------------------------
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_connectors = [
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# use "j3:1" reference for pin 1 of J3. This makes it a 1:1 translation with connector numbering
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("j3", "ZERO #N/A #N/A G5 F1 G4 E1 J3 C2 G3 D2 J2 E3 H2 D3 F3 C3 G1 B3 #N/A #N/A A2 A2"),
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("j4", "ZERO #N/A #N/A A5 B8 B5 C8 C5 D6 A6 B9 B6 C9 C6 D7 C7 D8 A8 D9 A9 E8 A2 A2"),
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("j5", "ZERO #N/A #N/A F8 J9 E7 J8 F7 G8 E6 H8 F6 J7 F5 G6 G9 H6 H9 J6 #N/A #N/A A2 A2"),
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(EfinixPlatform):
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default_clk_name = "clk33"
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default_clk_period = 1e9/33.333e6
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def __init__(self, toolchain="efinity"):
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EfinixPlatform.__init__(self, "T8F81C2", _io, _connectors, toolchain=toolchain)
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def create_programmer(self):
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return EfinixAtmelProgrammer()
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def do_finalize(self, fragment):
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EfinixPlatform.do_finalize(self, fragment)
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self.add_period_constraint(self.lookup_request("clk33", loose=True), 1e9/33.333e6)
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