mirror of
https://github.com/litex-hub/litex-boards.git
synced 2025-01-03 03:43:36 -05:00
181 lines
6.1 KiB
Python
181 lines
6.1 KiB
Python
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#
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# This file is part of LiteX-Boards.
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#
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# Copyright (c) 2024 Andelf <andelf@gmail.com>
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# SPDX-License-Identifier: BSD-2-Clause
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#
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# LCKFB LJPI FPGA board: https://wiki.lckfb.com/zh-hans/fpga-ljpi/
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from migen import *
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from litex.build.generic_platform import *
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from litex.build.gowin.platform import GowinPlatform
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from litex.build.gowin.programmer import GowinProgrammer, GOWIN_CABLE_FT2CH
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from litex.build.openfpgaloader import OpenFPGALoader
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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# Clk / Rst.
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("clk50", 0, Pins("T7"), IOStandard("LVCMOS33")),
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# Serial.
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("serial", 0,
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Subsignal("tx", Pins("F12")),
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Subsignal("rx", Pins("F13")),
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IOStandard("LVCMOS33")
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),
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# Leds. LED2 and LED3 are RGB LEDs.
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("led", 0, Pins( "R9"), IOStandard("LVCMOS33")),
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("led", 1, Pins("C10"), IOStandard("LVCMOS33")),
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("led", 3, Pins( "R7"), IOStandard("LVCMOS33")),
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("led", 2, Pins( "N6"), IOStandard("LVCMOS33")),
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("led", 4, Pins("T10"), IOStandard("LVCMOS33")),
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("led", 5, Pins( "P7"), IOStandard("LVCMOS33")),
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# Buttons. SW2
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("btn_n", 0, Pins("D11"), IOStandard("LVCMOS33")),
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# ("btn_n", 1, Pins("F10"), IOStandard("LVCMOS33")),
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# Reset. Use SW3 as reset button.
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("rst_n", 0, Pins("F10"), IOStandard("LVCMOS33")),
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# SPIFlash.
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# W25Q64JVSSIQ
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("spiflash", 0,
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Subsignal("cs_n", Pins("M9"), IOStandard("LVCMOS33")),
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Subsignal("clk", Pins("L10"), IOStandard("LVCMOS33")),
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Subsignal("miso", Pins("P10"), IOStandard("LVCMOS33")),
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Subsignal("mosi", Pins("R10"), IOStandard("LVCMOS33")),
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),
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# HDMI(LVDS).
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("hdmi", 0,
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Subsignal("clk_p", Pins("M10")),
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Subsignal("clk_n", Pins("N11")),
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Subsignal("data0_p", Pins("R13")),
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Subsignal("data0_n", Pins("T14")),
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Subsignal("data1_p", Pins("R11")),
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Subsignal("data1_n", Pins("T12")),
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Subsignal("data2_p", Pins("R12")),
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Subsignal("data2_n", Pins("P13")),
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IOStandard("LVCMOS33D DRIVE=8"),
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Misc("PULL_MODE=NONE"),
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),
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# 8-segment LED display, Common Anode.
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("seg8", 0, Pins("G13"), IOStandard("LVCMOS33")),
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("seg8", 1, Pins("H16"), IOStandard("LVCMOS33")),
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("seg8", 2, Pins("H12"), IOStandard("LVCMOS33")),
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("seg8", 3, Pins("H13"), IOStandard("LVCMOS33")),
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("seg8", 4, Pins("H14"), IOStandard("LVCMOS33")),
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("seg8", 5, Pins("G12"), IOStandard("LVCMOS33")),
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("seg8", 6, Pins("G11"), IOStandard("LVCMOS33")),
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# ("seg8", 7, Pins("L14"), IOStandard("LVCMOS33")),
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# DDR3 SDRAM
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# MT41J128M16JT-125K.
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("ddram", 0,
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Subsignal("a", Pins("F7 A4 D6 F8 C4 E6 B1 D8 A5 F9 K3 B7 A3 C8"),
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IOStandard("SSTL15")),
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Subsignal("ba", Pins("H4 D3 H5"), IOStandard("SSTL15")),
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Subsignal("ras_n", Pins("R4"), IOStandard("SSTL15")),
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Subsignal("cas_n", Pins("R6"), IOStandard("SSTL15")),
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Subsignal("we_n", Pins("L2"), IOStandard("SSTL15")),
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Subsignal("cs_n", Pins("P5"), IOStandard("SSTL15")),
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Subsignal("dm", Pins("G1 K5"), IOStandard("SSTL15")),
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Subsignal("dq", Pins(
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"G5 F5 F4 F3 E2 C1 E1 B3",
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"M3 K4 N2 L1 P4 H3 R1 M2"),
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IOStandard("SSTL15"),
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Misc("VREF=INTERNAL")),
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Subsignal("dqs_p", Pins("G2 J5"), IOStandard("SSTL15D")),
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Subsignal("dqs_n", Pins("G3 K6"), IOStandard("SSTL15D")),
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Subsignal("clk_p", Pins("J1"), IOStandard("SSTL15D")),
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Subsignal("clk_n", Pins("J3"), IOStandard("SSTL15D")),
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Subsignal("cke", Pins("J2"), IOStandard("SSTL15")),
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Subsignal("odt", Pins("R3"), IOStandard("SSTL15")),
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Subsignal("reset_n", Pins("B9"), IOStandard("SSTL15")),
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),
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# USB Type-C.
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("usb", 0,
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Subsignal("d_p", Pins("M14")),
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Subsignal("d_n", Pins("M15")),
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Subsignal("pullup", Pins("L15")),
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IOStandard("LVCMOS33")
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),
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# Wired to onboard GD32 MCU.
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("mcu_bus", 0,
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Subsignal("data", Pins("PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7"), IOStandard("LVCMOS33"))),
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]
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# Connector IOs ------------------------------------------------------------------------------------
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_connectors = [
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("h5", {
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1: "K16", 2: "J15",
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3: "J14", 4: "J16",
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5: "F14", 6: "F16",
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7: "J13", 8: "H11",
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9: "E16", 10: "F15",
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11: "C16", 12: "D15",
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13: "D16", 14: "E14",
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15: "B13", 16: "A14",
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17: "B14", 18: "A15",
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19: "A12", 20: "B11",
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21: "B12", 22: "C12",
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23: "C11", 24: "A11",
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25: "C9", 26: "A9",
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27: "E10", 28: "D10",
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29: "N10", 30: "M11",
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31: "P12", 32: "P11",
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33: "T13", 34: "T11",
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35: "R14", 36: "T15",
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}),
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("h6", {
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7: "G15", 8: "G14",
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9: "G16", 10: "H15",
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11: "L9",
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13: "L8", 14: "N9",
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15: "M6", 16: "M8",
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17: "M7", 18: "T6",
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19: "N7", 20: "N8",
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21: "P6", 22: "R8",
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23: "T9", 24: "P9",
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25: "T8", 26: "P8",
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27: "K14", 28: "K15",
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29: "K13", 30: "K12",
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31: "N15", 32: "P16",
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33: "P15", 34: "R16",
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35: "N16", 36: "N14",
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}),
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(GowinPlatform):
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default_clk_name = "clk50"
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default_clk_period = 1e9/50e6
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def __init__(self, toolchain="gowin"):
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GowinPlatform.__init__(self, "GW2A-LV18PG256C8/I7", _io, _connectors, toolchain=toolchain, devicename="GW2A-18C")
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self.toolchain.options["use_mspi_as_gpio"] = 1
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self.toolchain.options["use_sspi_as_gpio"] = 1
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def create_programmer(self, kit="openfpgaloader"):
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if kit == "gowin":
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# The board provides an external programmer with an emulated FT2232
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return GowinProgrammer(self.devicename, cable=GOWIN_CABLE_FT2CH)
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else:
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return OpenFPGALoader(cable="ft2232")
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def do_finalize(self, fragment):
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GowinPlatform.do_finalize(self, fragment)
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self.add_period_constraint(self.lookup_request("clk50", loose=True), 1e9/50e6)
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