partner/platform/fomu: cleaup, make it similar to others platforms
This commit is contained in:
Florent Kermarrec
parent
9f3ed82097
commit
0c1fa7f4a8
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@ -2,23 +2,27 @@
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# This file is Copyright (c) 2019 Sean Cross <sean@xobs.io>
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# License: BSD
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# fomu evt board from from crowd funding
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# design files at https://github.com/im-tomu/fomu-hardware/tree/evt/hardware/pcb
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#
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# Fomu EVT board:
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# - Crowd Supply campaign: https://www.crowdsupply.com/sutajio-kosagi/fomu
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# - Design files: https://github.com/im-tomu/fomu-hardware/tree/evt/hardware/pcb
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticePlatform
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from litex.build.lattice.programmer import IceStormProgrammer
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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("clk48", 0, Pins("44"), IOStandard("LVCMOS33")),
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("user_led_n", 0, Pins("41"), IOStandard("LVCMOS33")),
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("rgb_led", 0,
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Subsignal("r", Pins("40")),
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Subsignal("g", Pins("39")),
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Subsignal("b", Pins("41")),
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IOStandard("LVCMOS33"),
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),
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# alias blue led
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("user_led_n", 0, Pins("41"), IOStandard("LVCMOS33")),
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("user_btn_n", 0, Pins("42"), IOStandard("LVCMOS33")),
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("user_btn_n", 1, Pins("38"), IOStandard("LVCMOS33")),
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@ -51,33 +55,24 @@ _io = [
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Subsignal("dq", Pins("14 17 19 18"), IOStandard("LVCMOS33")),
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),
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("clk48", 0, Pins("44"), IOStandard("LVCMOS33")),
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]
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# Connectors ---------------------------------------------------------------------------------------
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_connectors = [
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("touch_pins", "48 47 46 45"),
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("pmoda_n", "28 27 26 23"),
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("pmodb_n", "48 47 46 45"),
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(LatticePlatform):
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default_clk_name = "clk48"
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default_clk_period = 1e9/48e6
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gateware_size = 0x20000
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# FIXME: Create a "spi flash module" object in the same way we have SDRAM
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spiflash_model = "n25q32"
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spiflash_read_dummy_bits = 8
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spiflash_clock_div = 2
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spiflash_total_size = int((16/8)*1024*1024) # 16Mbit
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spiflash_page_size = 256
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spiflash_sector_size = 0x10000
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def __init__(self):
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LatticePlatform.__init__(self, "ice40-up5k-sg48", _io, _connectors,
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toolchain="icestorm")
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LatticePlatform.__init__(self, "ice40-up5k-sg48", _io, _connectors, toolchain="icestorm")
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def create_programmer(self):
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return IceStormProgrammer()
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@ -1,24 +1,25 @@
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# This file is Copyright (c) 2019 Tom Keddie <git@bronwenandtom.com>
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# License: BSD
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# fomu hacker board
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# schematic at https://github.com/im-tomu/fomu-hardware/tree/master/hacker/releases/v0.0-19-g154fecc
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#
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# Fomu Hacker board:
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# - Design files: https://github.com/im-tomu/fomu-hardware/tree/master/hacker/releases/v0.0-19-g154fecc
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticePlatform
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from litex.build.lattice.programmer import IceStormProgrammer
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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("clk48", 0, Pins("F5"), IOStandard("LVCMOS33")),
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("user_led_n", 0, Pins("A5"), IOStandard("LVCMOS33")),
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("rgb_led", 0,
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Subsignal("r", Pins("C5")),
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Subsignal("g", Pins("B5")),
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Subsignal("b", Pins("A5")),
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IOStandard("LVCMOS33")
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),
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# alias blue led
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("user_led_n", 0, Pins("A5"), IOStandard("LVCMOS33")),
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("user_touch_n", 0, Pins("F4"), IOStandard("LVCMOS33")),
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("user_touch_n", 1, Pins("E5"), IOStandard("LVCMOS33")),
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@ -32,12 +33,6 @@ _io = [
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IOStandard("LVCMOS33")
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),
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("clk48", 0, Pins("F5"), IOStandard("LVCMOS33")),
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# Adesto AT25SF161 - 16-Mbit - 2 megabyte
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# Supports SPI Modes 0 and 3
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# Supports Dual and Quad Output Read
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#
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("spiflash", 0,
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Subsignal("cs_n", Pins("C1"), IOStandard("LVCMOS33")),
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Subsignal("clk", Pins("D1"), IOStandard("LVCMOS33")),
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@ -46,32 +41,20 @@ _io = [
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),
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]
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# Connectors ---------------------------------------------------------------------------------------
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_connectors = [
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# Pins
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# Pin 1 - F4 - Outside full square
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# Pin 2 - E5
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# Pin 3 - E4
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# Pin 4 - F2 - Near notch on bottom
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("touch_pins", "F4 E5 E4 F2"),
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(LatticePlatform):
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default_clk_name = "clk48"
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default_clk_period = 1e9/48e6
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gateware_size = 0x20000
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# FIXME: Create a "spi flash module" object in the same way we have SDRAM
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spiflash_model = "n25q32"
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spiflash_read_dummy_bits = 8
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spiflash_clock_div = 2
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spiflash_total_size = int((16/8)*1024*1024) # 16Mbit, 1megabytes
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spiflash_page_size = 256
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spiflash_sector_size = 0x10000
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def __init__(self):
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LatticePlatform.__init__(
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self, "ice40-up5k-uwg30", _io, _connectors, toolchain="icestorm")
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LatticePlatform.__init__(self, "ice40-up5k-uwg30", _io, _connectors, toolchain="icestorm")
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def create_programmer(self):
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return IceStormProgrammer()
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@ -1,24 +1,31 @@
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# This file is Copyright (c) 2019 Tom Keddie <git@bronwenandtom.com>
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# License: BSD
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# fomu pvt board from crowd funding
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# design files at https://github.com/im-tomu/fomu-hardware/tree/pvt/hardware/pcb
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#
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# Fomu PVT board:
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# - Crowd Supply campaign: https://www.crowdsupply.com/sutajio-kosagi/fomu
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# - Design files: https://github.com/im-tomu/fomu-hardware/tree/pvt/hardware/pcb
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from litex.build.generic_platform import *
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from litex.build.lattice import LatticePlatform
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from litex.build.lattice.programmer import IceStormProgrammer
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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("clk48", 0, Pins("F4"), IOStandard("LVCMOS33")),
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("user_led_n", 0, Pins("A5"), IOStandard("LVCMOS33")),
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("rgb_led", 0,
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Subsignal("r", Pins("C5")),
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Subsignal("g", Pins("B5")),
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Subsignal("b", Pins("A5")),
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IOStandard("LVCMOS33")
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),
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# alias blue led
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("user_led_n", 0, Pins("A5"), IOStandard("LVCMOS33")),
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("user_touch_n", 0, Pins("E4"), IOStandard("LVCMOS33")),
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("user_touch_n", 1, Pins("D5"), IOStandard("LVCMOS33")),
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("user_touch_n", 2, Pins("E5"), IOStandard("LVCMOS33")),
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("user_touch_n", 3, Pins("F5"), IOStandard("LVCMOS33")),
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("usb", 0,
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Subsignal("d_p", Pins("A1")),
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@ -27,12 +34,6 @@ _io = [
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IOStandard("LVCMOS33")
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),
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("clk48", 0, Pins("F4"), IOStandard("LVCMOS33")),
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# Adesto AT25SF161 - 16-Mbit - 2 megabyte
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# Supports SPI Modes 0 and 3
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# Supports Dual and Quad Output Read
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#
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("spiflash", 0,
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Subsignal("cs_n", Pins("C1"), IOStandard("LVCMOS33")),
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Subsignal("clk", Pins("D1"), IOStandard("LVCMOS33")),
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@ -48,32 +49,20 @@ _io = [
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),
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]
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# Connectors ---------------------------------------------------------------------------------------
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_connectors = [
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# Pins
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# Pin 1
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# Pin 2
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# Pin 3
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# Pin 4
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("touch_pins", "E4 D5 E5 F5"),
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]
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# Platform -----------------------------------------------------------------------------------------
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class Platform(LatticePlatform):
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default_clk_name = "clk48"
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default_clk_period = 1e9/48e6
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gateware_size = 0x20000
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# FIXME: Create a "spi flash module" object in the same way we have SDRAM
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spiflash_model = "n25q32"
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spiflash_read_dummy_bits = 8
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spiflash_clock_div = 2
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spiflash_total_size = int((16/8)*1024*1024) # 16Mbit, 1megabytes
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spiflash_page_size = 256
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spiflash_sector_size = 0x10000
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def __init__(self):
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LatticePlatform.__init__(
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self, "ice40-up5k-uwg30", _io, _connectors, toolchain="icestorm")
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LatticePlatform.__init__(self, "ice40-up5k-uwg30", _io, _connectors, toolchain="icestorm")
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def create_programmer(self):
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return IceStormProgrammer()
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