targets/1bitsquared_icebreaker: Revert to 128KB SPRAM.
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@ -92,8 +92,8 @@ class BaseSoC(SoCCore):
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self.submodules.crg = _CRG(platform, sys_clk_freq)
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self.submodules.crg = _CRG(platform, sys_clk_freq)
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# 128KB SPRAM (used as SRAM) ---------------------------------------------------------------
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# 128KB SPRAM (used as SRAM) ---------------------------------------------------------------
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self.submodules.spram = Up5kSPRAM(size=64*kB)
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self.submodules.spram = Up5kSPRAM(size=128*kB)
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self.bus.add_slave("sram", self.spram.bus, SoCRegion(size=64*kB))
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self.bus.add_slave("sram", self.spram.bus, SoCRegion(size=128*kB))
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# SPI Flash --------------------------------------------------------------------------------
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# SPI Flash --------------------------------------------------------------------------------
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self.add_spi_flash(mode="1x", dummy_cycles=8)
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self.add_spi_flash(mode="1x", dummy_cycles=8)
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