trenz_tec0117: Switch to LiteSPI.

This commit is contained in:
Florent Kermarrec 2021-07-28 10:34:17 +02:00
parent 9065cfa75d
commit 1118b09350
1 changed files with 4 additions and 2 deletions

View File

@ -60,7 +60,7 @@ class _CRG(Module):
# BaseSoC ------------------------------------------------------------------------------------------ # BaseSoC ------------------------------------------------------------------------------------------
class BaseSoC(SoCCore): class BaseSoC(SoCCore):
mem_map = {**SoCCore.mem_map, **{"spiflash": 0x00000000}} mem_map = {**SoCCore.mem_map, **{"spiflash": 0x80000000}}
def __init__(self, bios_flash_offset=0x0000, sys_clk_freq=int(25e6), sdram_rate="1:1", def __init__(self, bios_flash_offset=0x0000, sys_clk_freq=int(25e6), sdram_rate="1:1",
with_led_chaser=True, **kwargs): with_led_chaser=True, **kwargs):
platform = tec0117.Platform() platform = tec0117.Platform()
@ -79,7 +79,9 @@ class BaseSoC(SoCCore):
self.submodules.crg = _CRG(platform, sys_clk_freq) self.submodules.crg = _CRG(platform, sys_clk_freq)
# SPI Flash -------------------------------------------------------------------------------- # SPI Flash --------------------------------------------------------------------------------
self.add_spi_flash(mode="4x", dummy_cycles=6) from litespi.modules import W74M64FV
from litespi.opcodes import SpiNorFlashOpCodes as Codes
self.add_spi_flash(mode="4x", module=W74M64FV(Codes.READ_1_1_4), with_master=False)
# Add ROM linker region -------------------------------------------------------------------- # Add ROM linker region --------------------------------------------------------------------
self.bus.add_region("rom", SoCRegion( self.bus.add_region("rom", SoCRegion(