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nexys_video: generate clk100
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@ -42,6 +42,7 @@ class _CRG(Module):
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pll.create_clkout(self.cd_sys4x, 4*sys_clk_freq)
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pll.create_clkout(self.cd_sys4x_dqs, 4*sys_clk_freq, phase=90)
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pll.create_clkout(self.cd_clk200, 200e6)
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pll.create_clkout(self.cd_clk100, 100e6)
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self.submodules.idelayctrl = S7IDELAYCTRL(self.cd_clk200)
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