targets/siglent_sds1104xe: simplify etherbone by using new etherbone's params to specify hybrid mode
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@ -97,53 +97,32 @@ class BaseSoC(SoCCore):
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# Etherbone --------------------------------------------------------------------------------
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# Etherbone --------------------------------------------------------------------------------
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if with_etherbone:
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if with_etherbone:
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# FIXME: Simplify LiteEth Hybrid MAC integration.
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from litex.soc.integration.soc import SoCRegion
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from liteeth.common import convert_ip
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from liteeth.mac import LiteEthMAC
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from liteeth.core.arp import LiteEthARP
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from liteeth.core.ip import LiteEthIP
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from liteeth.core.udp import LiteEthUDP
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from liteeth.core.icmp import LiteEthICMP
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from liteeth.core import LiteEthUDPIPCore
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from liteeth.frontend.etherbone import LiteEthEtherbone
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# Ethernet PHY
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# Ethernet PHY
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self.ethphy = LiteEthPHYMII(
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self.ethphy = LiteEthPHYMII(
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clock_pads = self.platform.request("eth_clocks"),
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clock_pads = self.platform.request("eth_clocks"),
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pads = self.platform.request("eth"))
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pads = self.platform.request("eth"))
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etherbone_ip_address = convert_ip("192.168.1.51")
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etherbone_mac_address = 0x10e2d5000001
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# Ethernet MAC
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self.add_etherbone(
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self.ethmac = LiteEthMAC(phy=self.ethphy, dw=8,
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phy = self.ethphy,
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ip_address = "192.168.1.51",
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mac_address = 0x10e2d5000001,
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data_width = 8,
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interface = "hybrid",
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interface = "hybrid",
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endianness = self.cpu.endianness,
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endianness = self.cpu.endianness)
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hw_mac = etherbone_mac_address)
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# Software Interface.
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## Software Interface.
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self.add_memory_region("ethmac", getattr(self.mem_map, "ethmac", None), 0x2000, type="io")
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ethmac = self.get_module("ethcore_etherbone").mac
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self.add_wb_slave(self.mem_regions["ethmac"].origin, self.ethmac.bus, 0x2000)
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ethmac_region_size = (ethmac.rx_slots.constant + ethmac.tx_slots.constant)*ethmac.slot_size.constant
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ethmac_region = SoCRegion(origin=self.mem_map.get("ethmac", None), size=ethmac_region_size, cached=False)
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self.bus.add_slave(name="ethmac", slave=ethmac.bus, region=ethmac_region)
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# Add IRQs (if enabled).
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if self.irq.enabled:
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if self.irq.enabled:
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self.irq.add("ethmac", use_loc_if_exists=True)
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self.irq.add("ethmac", use_loc_if_exists=True)
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# Hardware Interface.
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self.arp = LiteEthARP(self.ethmac, etherbone_mac_address, etherbone_ip_address, sys_clk_freq, dw=8)
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self.ip = LiteEthIP(self.ethmac, etherbone_mac_address, etherbone_ip_address, self.arp.table, dw=8)
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self.icmp = LiteEthICMP(self.ip, etherbone_ip_address, dw=8)
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self.udp = LiteEthUDP(self.ip, etherbone_ip_address, dw=8)
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self.add_constant("ETH_PHY_NO_RESET") # Disable reset from BIOS to avoid disabling Hardware Interface.
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self.add_constant("ETH_PHY_NO_RESET") # Disable reset from BIOS to avoid disabling Hardware Interface.
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# Etherbone
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self.etherbone = LiteEthEtherbone(self.udp, 1234, mode="master")
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self.bus.add_master(master=self.etherbone.wishbone.bus)
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# Timing constraints
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eth_rx_clk = self.ethphy.crg.cd_eth_rx.clk
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eth_tx_clk = self.ethphy.crg.cd_eth_tx.clk
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self.platform.add_period_constraint(eth_rx_clk, 1e9/self.ethphy.rx_clk_freq)
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self.platform.add_period_constraint(eth_tx_clk, 1e9/self.ethphy.tx_clk_freq)
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self.platform.add_false_path_constraints(self.crg.cd_sys.clk, eth_rx_clk, eth_tx_clk)
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# Video ------------------------------------------------------------------------------------
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# Video ------------------------------------------------------------------------------------
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video_timings = ("800x480@60Hz", {
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video_timings = ("800x480@60Hz", {
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"pix_clk" : 33.3e6,
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"pix_clk" : 33.3e6,
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